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How to Export and Get Started with IPC-2581

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The IPC-2581, also known as IPC-DPMX (digital product model exchange), provides a unified design data format, enabling seamless data exchange between designers and fab houses. 

IPC-2581-Re-engineering.jpg
IPC-2581 integrates multiple files in a single system and streamlines the circuit board re-engineering process

Here, you will learn how to export the IPC-DPMX file using Cadence Allegro, Altium Designer, and KiCAD.

Step-by-step guidelines to export IPC-2581 file from Cadence Allegro

To get started with IPC-2581, follow the procedure below.

Step 1:  Choose File -> Export -> IPC2581 to launch the IPC2581 Export form in Allegro PCB Editor.

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Launch the IPC-2581 Export form in Allegro PCB Editor

Step 2: Enter the output file name and destination.

IPC-2581-export-file-name.jpg
Name the output file in the IPC2581 Export form
IPC-2581-export-destination.jpg
Enter the file path in the IPC2581 Export form in Cadence Allegro PCB Editor

Step 3: Select the version (1, A, B, or C) and units (millimeter, micron, inch) that best suit your requirements.

IPC-2581-export-from-cadence-select-revision-and-unit.jpg
Choose the version and unit in the IPC2581 Export dialogue box

Step 4: Under File Segmentations and Function Apportionment, choose a functional mode for data extraction. The default option is ASSEMBLY

file-segmentation-and-apportionment-section.jpg
File Segmentations and Function Apportionment section in the IPC2581 Export form

Step 5:  If you want to generate film for specific or all layers, click Film Creation to open the Artwork Control Form.

IPC-2581-export-film-creation.jpg
Generate film for all layers (if required) using the Artwork Control Form

Check the specific layers for which you want to generate films. Click Select All to generate film for all layers. 

IPC-2581-export-open-artwork-control-form-Cadence-Allegro.jpg
Artwork Control Form to export IPC-2581 in Cadence Allegro

Step 6: To customize layer mapping for inner copper, outer copper, documentation, etc., hit Layer Mapping Editor.

layer-map-editor-to-export-ipc-2581-in-allegro.jpg
Launch Layer Mapping Editor in Cadence Allegro to export IPC-2581
IPC-2581-layer-map-editor.jpg
IPC2581 Layer Mapping Editor in Cadence Allegro

Step 7:  Click Export to generate the IPC-2581 file.

IPC-2581-export.jpg
Export the IPC-2581 file in Cadence Allegro PCB Editor

Step-by-step procedure to export the IPC-2581 file from Altium Designer

Step 1: Choose File -> Fabrication Outputs-> IPC2581 to launch the IPC-2581 configuration dialogue box from Altium Designer.

IPC-2581-file-export-from-Altium-designer.jpg
Launch the IPC-2581 Configuration window in Altium Designer

Step 2: Select the IPC-2581 version (A or B), the measurement system, and the floating point precision you wish to apply during the export process.

Launch the IPC-2581 Configuration window in Altium Designer
Enter the details in the IPC-2581 Configuration window

Step 3: Click OK to export.

IPC-2581-export-from-Altium-designer.jpg
Export the IPC-2581 file in Altium Designer PCB Editor

Exporting the IPC-DPMX design data from KiCad

Step 1: File -> Fabrication Outputs -> IPC2581 File (.xml) to open the Export IPC-2581 dialogue box in KiCAD.

IPC-2581-file-export-KiCAD-1.jpg
Path to open the Export IPC-2581 dialogue box in KiCAD

Step 2: Choose the destination folder and enter the output file name.

IPC-2581-export-KiCAD-destination.jpg
Destination folder and output file name in KiCAD

Step 3: Choose the desired measurement units, precision, and IPC-2581 version.

IPC-2581-export-KiCAD-version.jpg
Enter the details in the Export IPC-2581 window of KiCAD

Step 4: Click Export to get started with the IPC-2581 file generation.

IPC-2581-export-from-KiCAD.jpg
Click on export to download the IPC-2581 file

The unified file is then shared with the fabricators. They import the smart design data file using CAM systems to produce PCBs based on the design data provided by designers.

Generating IPC-2581 build-up using Sierra Circuits Stackup Designer

Step 1: Run the Stackup Designer to generate your layer stack. Click on Report to view your build-up.

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Stackup Designer providing stack-up recommendations

Step 2: Hit Export to IPC 2581. to download the stack-up data with a .XML extension.

exporting-IPC-2581-from-sierra-satckup-designer.jpg
Exporting the IPC-2581 file from Sierra Circuits’ Stackup Designer

 

tool-image

PCB DESIGN TOOL

Stackup Designer

Calc TRY TOOL

 

IPC-DPMX design data submission checklist

Include the following data before submitting the file to your CM:

You can also mention the following depending on your design requirements:

  • 3D model
  • Simulation files (including relevant files for thermal and signal integrity)
  • Changes or revisions made to the design

IPC-2581 revision B inclusions

Revision B offers improved drilling and drill types features, allowing a more detailed dataset for drill and drilling processes. The improvements include:

  1. Back drilling specifications within the Layer Stack section of the design data file. It defines critical parameters such as:
    • Back drill diameter
    • Depth of back drill
    • Location (specified through coordinates or referencing other features)
    • Plating requirements (optional)
  2. Pad stack references are defined in a dedicated Pad Stack Library. It includes:
    • Layer composition
    • Via types and sizes
    • Solder mask and paste mask openings

      Padstack definition in IPC-2581 file.jpg
      Padstack definition in IPC-2581 file
  3.  Additional features, such as geometry object fill types, line types, user-defined primitives, pin orientation, and design intent notes, are included.

    Component xy data.jpg
    Component X-Y data and rotation details in IPC-2581

IPC-2581 revision C improvements over revision B

The Rev C is a big upgrade over its previous versions. It introduces notable improvements such as:

  1. Specifications for flex stack-ups, defining critical parameters such as:
    • Bend line, Bend area, type, and order
    • Direction
    • Radius
    • Angle
  2. Component mounting configurations, including screen-down components, embedded components (face-up and face-down), and wire bond components.

    Face-up-and-Face-down-components.jpg
    Face-up and Face-down components
  3. Test points 
  4. Side plating and intentionally shorted nets (beneficial for RF circuit applications).
  5. 3D model data integration to define thermal relief, enhancing thermal management capabilities in PCB designs.

The new and unique features of IPC-DPMX rev C significantly enhance its capabilities. Hemant Shah, the chairman of the IPC-2581 consortium, said:

‘Revision C was a big overhaul of the standard.’

hemanth-shah-the-chairman-of-IPC-2581-consortium
Hemanth Shah, the chairman of IPC-2581 consortium

Watch our interview with Hemant Shah, the benefits of IPC-2581 revision C.

Controlled impedance specifications in IPC-DPMX revision C

IPC-2581 rev C:

  • Enables the precise definition of impedance requirements at the net, layer, or stack-up.
  • Identifies the differential pairs.
Impedance-specifications-for-differential-pairs-IPC-2581.jpg
Impedance specifications for differential pairs with additional notes in IPC-2581
  • Considers trace width and spacing parameters for impedance calculations.
  • Accommodates various transmission line configurations, including coupled microstrips, single-ended, edge-coupled, broadside-coupled, and coplanar waveguides.
  • Integrates a standardized library of material dielectric constants and loss tangents, enhancing accuracy and consistency in impedance calculations.
  • Streamlines the impedance specification process by eliminating the need for a separate impedance table upload.

 

tool-image

PCB DESIGN TOOL

Impedance Calculator

Calc TRY TOOL

 

Bi-directional DFM feedback

This smart design data format facilitates the electronic exchange of DFM data, including questions, exceptions, and design edits.

 IPC-2581 with graphical DFM error marking.jpg
IPC-2581 with graphical DFM error marking
  • It allows for real-time exchange of DFM feedback between designers and manufacturers with comments, approvals, and rejections.
  • The format marks the PCB design for manufacturing errors graphically and links them directly to design data within the DPMX file, streamlining the identification and resolution process.
  • It enables tracking which errors the designers/customer fixes for each design and identifies the ones that are waived, offering transparency throughout the manufacturing process.
  • Approved DFM can be electronically stored within the file instead of an engineer’s disk drive or cloud storage.
  • IPC-DPMX records the metrics easily over time for a specific customer and project.

 

Learn how to design a cost-efficient PCB without board respins. Download the Design for Manufacturing Handbook.

Design for Manufacturing Handbook - Cover Image

Design for Manufacturing Handbook

10 Chapters - 40 Pages - 45 Minute Read
What's Inside:
  • Annular rings: avoid drill breakouts
  • Vias: optimize your design
  • Trace width and space: follow the best practices
  • Solder mask and silkscreen: get the must-knows

 

 IPC-2581 Vs Gerber and ODB++

Here’s a quick comparison among IPC-2581, Gerber, and ODB++ formats.

Comparing-IPC-2581-with-Gerber-RS-274X and ODB++.jpg
Comparing IPC-2581 with Gerber RS-274X and ODB++

1. Facilitates smart stack-up design data hand-off

In the current method of stack-up exchange, CAM engineers manually create Gerber and ODB++ files for individual layers, solder masks, and silkscreen. The stack-up details are exported in separate fab drawings. These details are then exported as separate text files, requiring manufacturers to import and decode the information from ASCII code.

manual-generation-of stack-up-data-from-Gerber.jpg
Manual generation of stack-up data from Gerber

On the other hand, IPC-2581 streamlines the communication between designers and manufacturers by providing a standardized format for stack-up information exchange.

Stack-up in IPC-2581.jpg
IPC-2581 stack-up information with the layer name, order, material thickness, and dielectric constant

The standardized IPC-DPMX includes:

  • Dielectric, conductive material, and coating characteristics
  • Signal, power, and ground layer thicknesses and tolerances
  • Layer stack sub-groups
  • Sequence of the layers
  • Stack-up status is indicated with enumerations such as:
    • Specified
    • Proposed
    • Approved

2. Offers standardized single-file system

Gerber files require over 30 files to define different manufacturing aspects. The data, commonly encoded in ASCII, conveys critical information required for printed circuit board fabrication. However, these files can also use different formats, like EBCDIC, EIA, or ISO codes, for compatibility with various systems.

Multiple-files-in-Gerber-format.jpg
Multiple files in Gerber format

On the other hand, the ODB++, exported in .tgz, .tar, .gz, .zip, or .tar extensions, is a complex and large file with multiple data layers.

layer-image-stack-up.jpg
Multiple files for PCB stack-up in ODB++

IPC-2581, in contrast, adopts a neutral XML-based format that consolidates all design and manufacturing information into a single file.

Its unified approach simplifies data exchange and improves overall design and manufacturing workflow efficiency.

IPC-DPMX includes comprehensive data as listed below:

  • Schematic data
  • Netlist
  • Stack-up
  • Drilling and routing details
  • Plating tolerances
  • Dielectric, outer, and inner copper layer information
  • BOM
  • Solder mask and paste layers
  • Tooling support: blind/buried vias, V-groove, slots, and cavities
  • Top and bottom assembly layers with precise component attributes, positioning, and footprint markings
  • Component pick-and-place file

3. Streamlines re-engineering process

The re-engineering process for Gerber and ODB++ files presents challenges due to their primary focus on manufacturing data, which excludes crucial details such as netlist and BOM.

Cumbersome-re-engineering-process-with-Gerber.jpg
The cumbersome re-engineering process with Gerber

Variations in file format across different software tools often result in compatibility issues, which require manual interpretation and data conversion. The iterative documentation and electronic communication channels further contribute to the complexity of the re-engineering task.

When we talk about the open standard IPC-2581, it ensures consistent interpretation across diverse software tools.

single file system IPC-2581.jpg
Single file system in IPC-2581

The XML-based format: 

  • Includes valuable component details like values, datasheets, and BOM references, eliminating the need for external searches and manual data gathering.
  • Allows you to upload external references (photos, URLs, and videos) to express the right design intent.
  • Supports version control, allowing you to track changes and revert to previous versions.
  • Replaces error-prone e-paper-based communication with efficient electronic bi-directional communication, reducing time and improving collaboration and efficiency.

For FAQs on IPC-DPMX, see IPC-2581 questions answered by consortium members.

Adopting the smart design data format as part of your workflow can lead to smoother collaboration, quicker turnaround times, and improved communication with manufacturers.

LEARN PCB
PCB Manufacturing
PCB Assembly
PCB Design and Layout
PCB Basics
Vias, Drilling & Throughplating
Mechanics
Surface
SMD
Quality
SPECIFICATIONS
PCB Fabrication
STANDARDS & POLICY
PCB Ordering
Policy

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