Via filling is a technique in which the plated hole is completely filled with a conductive or non-conductive material. It enhances the reliability of the PCB by reducing the possibility of air or liquid getting trapped.
In this article, you will learn the benefits, types, manufacturing process, and failure analysis of via filling.
What is the purpose of via filling?
A via is a copper-plated hole that creates an electric connection between different layers of a PCB. Normally, any type of via such as through-hole, microvia, blind, and buried can be filled. First, the hole wall is plated to make it conductive. Later, the barrel is filled with conductive (copper) or non-conductive (resin) material.
The purpose of filling vias is to:
- Avoid the entry of any impurities. Hence, there is a lower chance of contamination or corrosion
- Improve the mechanical strength of vias and pads
- Place SMT components on the via hole (only if it is resin-filled)
- Strengthen the pad attachment
- Reduce the risk of solder wicking
- Prevent the trimming of silkscreen printing
- Enhance the thermal conductivity and current capacity of a via (if it is conductive filled)
What are the types of via filling?
You need to carefully consider the choice of via-filling as it impacts the board’s cost and production time.
Conductive polymer filling
Conductive materials like copper or silver epoxy are used to fill the holes. These metals aid in effectively transferring the electric signal and improve the thermal conductivity of the via. The conductive filling can also help to deviate the heat from large components like ICs, BGAs, microcontrollers, and processors.
Copper epoxy has better thermal conductivity, but silver epoxy is more cost-effective.
Compared to non-conductive filling, conductive polymer filling can be expensive. However, it can create a perfect plating of via walls without any voids. This can significantly improve the current flow between the inner layers.
Non-conductive via filling
This does not improve the electrical or thermal conductivity of the via. It provides structural support to the pad in case of a via-in pad. During the PCB manufacturing process, the epoxy paste or resin is filled into regular vias. The walls are still plated with copper for electrical connectivity. It is important to avoid voids in the plating as they can create connectivity issues.
Fab notes for via filling
- Always mention the type of via fill (conductive or non-conductive).
- The CTE values of the via filling and dielectric material should be equivalent to avoid stress fractures due to expansion.
- Plating thickness and via-in-pad specification, if any.
IPC Class 3 Design Guide8 Chapters - 23 Pages - 35 Minute Read
- IPC guidelines for manufacturing defects
- IPC standards for assembly processes
- Common differences between the classes
- IPC documents to set the level of acceptance criteria
IPC 4761 standards for via filling and via covering
Via covering and filling benchmarks are depicted in the IPC 4761 standards. In this section, you will learn about the 12 standards defined in the document.
Type I (a): Via is tented on a single side using solder mask. There is no protection for the hole walls on the other side. It can also have long-term reliability issues.
Type I (b): The hole is tented on both sides with solder mask. This type of via covering can have dimples on the surface.
Type II (a): Here, the via is covered with a second mask layer on a single side.
Type II (b): The via is tented and covered with a secondary mask on both sides.
Type III (a): The via is partially filled or plugged with liquid photo imageable (LPI) solder mask or resin material. Here, the material can protrude from the other side.
Type III (b): The LPI solder mask or resin plugs both ends of the via. This can cause the air or the solvent to be trapped in the middle, which can blow out during the curing process. The mask can also cover the annular ring and affect connectivity.
Type IV (a): In this type, the via is plugged and covered with a resin/solder mask on one side. The plug is strengthened by the additional mask layer.
Type IV (b): The via is plugged and covered on both sides with a solder mask.
Type V: The via is completely filled with conductive or non-conductive material. This avoids the contamination of the copper walls. Planarization of the surface is required if you opt for this type of filling.
Type VI (a): The via is completely filled and covered with LPI solder mask on one side. It reduces the risk of voids on the surface of the filled hole.
Type VI (b): Here, the via is completely filled and the solder mask covers both sides of the plated hole.
Type VII: The filled via is capped with a secondary metalized coating on both sides. This is mostly used for via-in-pad and stacking of microvias in HDI boards. Creating a strong adhesion between the metal coating, filling, and copper pad can be an issue. If the via is not filled or the metal coating is thin, it can cause dimples on the surface. The air trapped in the dimples can cause issues during PCB assembly.
All of the above via types have their own drawbacks. Always consider your manufacturer’s recommendations before deciding on the type.
- Supports two types of via pattern
- Gives a comprehensive list of conductive and non-conductive epoxy via fills with Tg, CTE, and thermal conductivity values
- Supports multiple units of via dimensions and plating thickness
- Determines via thermal resistance by optimizing drill diameter and via-to-via spacing
How do you fill vias during PCB manufacturing?
Filled vias are processed before creating other metalized through-holes to make sure only the desired drills are filled. Before this process, the board will be cleaned to eliminate contamination. Below are the manufacturing steps :
Drilling: The vias that need to be filled are drilled first. While drilling it is also essential that the drill penetrates and exposes the bottom layer or target pad. The hole can be drilled with either mechanical or laser drilling.
The choice of equipment is based on cost, volume of production, precision, hole depth, and diameter. It is also important to consider that mechanical drills have the risk of drill wander. Additionally, ensuring the right hole size and aspect ratio is also important.
Cleaning: The heat generated during the drilling process causes the resin to smear on the copper features of the hole. Furthermore, it also leaves burrs on the edge of the via and other residues. Hence, the drilled hole is cleaned using a brush and solvents. Later, it goes through a de-smearing process.
Preparation for plating: For electroplating, it is essential to have a conductive copper layer inside via holes since they also contain fiberglass. This can be achieved using traditional electroless plating or the black hole process.
Plating: A photoresist is used to create the image of via holes that require filling. The photoresist over the via is removed after development so that only desired are exposed. Now, using the electroplating process, via walls are plated with copper. Next, the complete photoresist layer is removed and baked to remove the moisture.
Filling with resin: After plating, vias are ready to be filled with resin. The filling process is conducted with pressure and vacuum to avoid any voids in the hole barrel. The excess resin is removed from the board and baked to harden.
Planarization: After curing, the filled resins can have bumps. Hence, a machine with mechanical brushes removes the excess resin and creates a uniform surface. This is called planarization. This facilitates a smooth over-plating process, which is essential for soldering components.
The above-mentioned manufacturing steps are additional and only required if your design has a filled via. Hence, this can increase the cost of production.
Filling of via-in-pad
Filled and capped vias are also used as via-in-pad solutions. Here, the hole is placed on the component pad as shown in the image below. This will make the signal path much shorter when compared to the traditional dog bone structure. It is noteworthy that if the via is not placed on the pad then there is no need for a filling. An extra plating step is required to cap the filled via. Hence, this can further increase the cost and turnaround time of your PCB.
Filling of microvias in HDI boards
Filling and plating the microvia is done in a special plating tank. It plates the laser-drilled hole from bottom to top until the hole is completely filled. Always plate stacked vias and vias-in-pad to improve reliability. For staggered vias the holes need to be closed as the resin can seep into the hole during the lamination process.
HDI PCB Design Guide5 Chapters - 52 Pages - 60 Minute Read
- Planning your stack-up and microvia structure
- Choosing the right materials
- Signal integrity and controlled impedance in HDI
- Manufacturing considerations for higher yields
Failure analysis of filled vias
Many factors can cause the failure of a filled via such as large dimples, leakage, and a void inside. Hence, each element has to be analyzed for potential failures and resolved. Below are a few reasons for filled via failures.
Fractures in the via wall create an electrical discontinuity
The general reason for failure is barrel stress. This causes cracking of the via plating, which can cause connectivity issues. The stress in the hole walls can be avoided by plating a thicker copper layer.
Void in filled vias cause reliability issues
Another reason for failure can be trapped air inside the barrel. All the air should be removed in the cleaning step. Using a solvent with lower surface tension can help.
Voids can cause reliability issues and reduce the life span of the via. The impact of a void depends on its size, shape, and location. Small and spherical gaps cause fewer issues when compared to large gaps. IPC 6012 standard depicts the guidelines for the acceptable voids present in the via, barrel fill, and plating.
- For class 2 boards, 1 void is allowed per hole. It should not exceed 5% of the hole. 50% of barrel fill is essential for through-hole leads.
- For class 3 boards no void is allowed. 75% of the barrel must be filled.
- Determines the current carrying capacity of a via
- Computes resistance, voltage drop, and power loss for a specific current
- Calculates three important aspects of via design: via diameter, current capacity, and temperature rise
- Supports multiple unit systems (oz, mils, millimeters, or micrometers)
Environmental impurities can result in voids
With many types of equipment, materials, and chemicals used in the production environment, it is difficult to remove all the pollutants. The microparticles that are not visible to our naked eye can end up in the via barrel. This will create a void during the filling process and eventually result in the failure of a via.
The following steps can help avoid impurities:
- Enclose the production line to reduce the risk of debris
- Ensure that all the materials used are of top quality
- Plating agents should be filtered regularly to maintain their vividness and purity
Imbalanced plating process can cause voids
Voids can occur when the plating rate is not uniform. The imbalance of leveling agents and poor solution agitation are the main reasons for this. Ensuring the right proportions of the plating chemicals and periodically checking the condition of the solutions will reduce voids.
Filling vias can improve their electrical conductivity, thermal dissipation, and mechanical strength. Based on your design and cost constraints, you can choose a suitable via fill. It is also important to find a manufacturer who can build vias as per your requirements. If you need any assistance in designing your vias, please comment below. Our manufacturing and design experts will be happy to help you.