Multi-layered printed circuit board design requires a means to establish connections between various layers. This is done using vias ranging from through-hole vias to via-in-pad technology. While traces serve as horizontal connection elements, vias function as vertical connection elements, enabling signal and power to travel between board layers.
Before we talk about via-in-pad technology, let’s have a look at the different types of vias that are frequently used in PCB design based on functionality:
What are the different types of vias?
Most PCBs contain these vias to establish connectivity between PCB layers:
This is the most common via type and is a hole drilled through all layers of a PCB. It is the simplest via type and is most cost-effective. It however takes up more space on your PCB, reducing the space required for components.
This via connects the external layers with the internal layers of the PCB without going through the whole PCB.
Buried vias connect internal layers of the PCB, are more complex to create and come at a higher cost. These holes originate and end in the internal layers of the PCB and are not visible from the exterior.
Also read, PCB Via Design Using Altium Designer
Microvias are minute holes with the size equal to or less than 6 mils, drilled in a PCB using a laser. Microvias are generally implemented in HDI PCBs.
HDI PCB Design Guide5 Chapters - 52 Pages - 60 Minute Read
- Planning your stack-up and microvia structure
- Choosing the right materials
- Signal integrity and controlled impedance in HDI
- Manufacturing considerations for higher yields
Vias play a crucial role in interconnection as they are used to route electrical signals between layers. Refer to our post on designing a via with current-carrying capacity to understand factors affecting via current, via fabrication types, etc.
What is a via-in-pad?
Here the via is placed directly on the copper pad of a surface-mounted component and plated with copper (VIPPO), as opposed to a conventional via in which the signal-carrying trace is routed away from the pad (dog-bone), to the via. A via-in-pad serves the function of miniaturizing the PCB form factor by reducing the space taken up by trace routing. The most typical applications of these via-in-pads are with BGA components of pitches 0.5mm or less.
The use of via-in-pad technology minimizes signal path lengths which cuts down on the parasitic inductance and capacitance effect.
What are the advantages of via-in-pad (VIP) routing?
VIP routing is used when the board size is limited, the design components have very small footprints, and when the surface routing options are restricted by design. VIP routing is typically used with BGAs.
It is also worth noting that when PCBs have complicated devices in compact areas, designers place vias in the surface mount device (SMD) pads to fan out the connections. If your design has via-in-pad features on SMD pads, Sierra Circuits can fill the vias with non-conductive epoxy filling to obtain the best quality for assembly soldering.
There are other advantages for the PCB as well when using VIP routing. When you compare via-in-pad to other routing options,
- It is easier to route fine pitch ball grid arrays (BGAs) which can turn out to be smaller than 32 and 40 mils (0.8mm and 1mm).
- When you eliminate surface routing you can place bypass capacitors closer to components, therefore minimizing inductance. This is useful for enhanced thermal management.
- Via-plugging is not necessary as vias are situated directly under the component. Via-plugging involves sealing open vias which may wick in solder paste during assembly.
- VIP routing also works wonders for high-frequency component grounding.
The downside of capped via/via-in-pad technology
VIP routing can be achieved by overcoming certain complexities in manufacturing. The manufacturer will have to eliminate surface bumps, complicating the process required to attach components such as BGAs as stated below:
- The manufacturer will have to create and fill extra vias for this type of routing adding new steps to the fabrication process which include drilling additional holes, plating vias with conductive material such as copper. Later, you fill the vias with epoxy and cap them with copper.
- The capped vias are sometimes prone to offgassing. Offgassing or outgassing refers to blow-off vapor due to thermal expansion of gas. The gas is a result of phase transition from liquid to vapor due to heating during the soldering process.
- The outgassing phenomena leads to formation of voids in solder joints because air bubbles travel upwards through vias.
Conventional vias vs. via-in-pad PCB design
You can use solder mask as a plugging medium to prevent solder from being drawn into the via cavity, which is a conventional method. In case of VIP structures, however, you require a completely filled via cavity to eliminate the air entrapment and outgassing. You will also require a precisely flat planar surface to attach BGAs of fine pitch, reliably.
Manufacturing options you can use for VIP are mechanically drilled, plated and non-conductive epoxy filled method and laser-ablated and fully copper filled via-in-pad methods.
Non-conductive epoxy via fill
Mechanically drilled via-in-pad holes as stated need to be filled with epoxy. The choice of epoxy depends largely on the coefficient of thermal expansion (CTE) of the via-in-pad fill material and the laminate used. This is important because as the PCB undergoes heating and cooling phases during stack-up, the fill material will move with or against the surrounding laminate board material. It can cause stress-induced fractures and even electrical circuit breaks.
Since non-conductive epoxies have CTEs that are a closer match to that of laminates, you choose them often. This is also a cost-effective option as well. The design and intent of a PCB will ultimately decide the type of epoxy that is required for a via fill.
- Supports two types of via pattern
- Determines the thermal resistance of via/vias by optimizing drill diameter and via-to-via spacing
- Provides a list of commonly used conductive and non-conductive epoxy via fills along with their thermal characteristics (Tg, CTE, and k)
One major feature of component/device footprint determines the manufacturing method used to generate a via-in-pad – the pad diameter. To meet minimum annular ring requirements for IPC Class 2 or Class 3, pad size should be enough to allow for via diameter and along with the material size needed for manufacturing tolerances.
When using standard mechanical drilling, you need to consider the pilot drill size (pre-plating drill diameter) and the annular ring, which is the pad after copper plating the drilled hole. When the remaining annular ring is not sufficient after specifying the smallest drill diameter, you need to use laser microvias. To be clear an annular ring is the area of the copper pad around a drilled and finished hole.
Sierra Circuits’ capabilities
The most frequent scenarios for use of via-in-pad technology are as given below. Sierra Circuits’ online offering can handle all such scenarios if the vias are at least 6 mils (.006″) wide.
Learn more about QFN packages here: What Are QFN Packages?
In certain cases, you don’t have to fill vias. In these scenarios, you don’t need to mark them as “via-in-pad” features using Sierra Circuits online quoting.
Thermal pads don’t require soldering, so you don’t need to count them as via-in-pad for online quoting.
When you don’t actually place vias on the pads, you won’t need to fill the vias. Hence you don’t need to mark these as via-in-pad in the Sierra Circuits online quoting tool.
- Determines the current carrying capacity of a via
- Calculates via resistance at ambient and high temperatures
- Computes voltage drop and power loss at maximum via current
Guidelines for via-in-pad routing
If the PCB design calls for creating vias-in-pad, you need to reduce problems in manufacturing and minimize excess cost and time needed for this particular type of routing.
You can use the via-in-pad guidelines given below for surface mount device routing:
- Stick to recommendations given by component manufacturers for component placement and via capping and filling.
- Limit microvias to one layer of the PCB.
- Ensure you cap the non-component side with solder mask.
- Avoid leaving vias open unless absolutely necessary – leaving vias open exposes the via copper to the environment leading to oxidation effects or worse. This can shorten PCB life.
Electronic components are always shrinking in size, and hardware engineers will need to learn and use innovative tools and techniques to install these components in a way that is scalable and reliable. Via-in-pad technology is a great step towards innovative PCB build techniques.
IPC Class 3 Design Guide8 Chapters - 23 Pages - 35 Minute Read
- IPC guidelines for manufacturing defects
- IPC standards for assembly processes
- Common differences between the classes
- IPC documents to set the level of acceptance criteria