TDR Impedance Measurements
A Few Notes about TDR
I called Ken Taylor, the president of U.S. operations for Polar Instruments, regarding a question from a customer about a time-domain reflectometer my fab uses for impedance tests. Not only was the conversation very helpful, but almost immediately after we spoke Ken sent a detailed email, then a second email, that are well worth repeating. So, with his kind permission, here are the contents.
The TDR is a time-domain reflectometer. It does not operate in the frequency domain. The high- frequency harmonics present in a pulse are mainly evident in the speed of the rising (or falling) edge.
“Let me follow up with a few notes about your customer’s question, ‘What is the rise time of Polar’s TDR?’. It is a common question based mostly on misunderstanding. From the question, one may infer that the customer wants to know what will be the impedance at a certain frequency. Here’s some background.
The TDR is a time-domain reflectometer. It does not operate in the frequency domain. The high-frequency harmonics present in a pulse are mainly evident in the speed of the rising (or falling) edge. However, impedance is measured on the flat top of the pulse, not on an edge measurement.
So, what is the relevance of the edge speed? Edge speed does determine measurement resolution: i.e. a fast edge will reveal a short discontinuity; slower edges can see only longer discontinuities. Yet, because fast edges do respond to short discontinuities, they react greatly to the discontinuity of the probe tip, the signal injection pads and vias, and the discontinuity (typically) of the test trace at the injection point–for example, where a differential pair spreads out to reach the probe pads. This results in waveform aberrations that will typically mask or distort the test region of the measurement waveform.
For a frequency test, you must use a frequency-domain tester, e.g. a VNA, which will sweep a sine wave through a range of frequencies and thus make tests at specific frequencies. This is usually to ascertain signal loss at those frequencies. Board fabs typically don’t use a VNA because of all the disadvantages. Namely, the front-end is delicate and easily damaged; it requires manual intervention by a skilled operator; results vary from one user to the next; and the time involved is usually seconds to minutes. A TDR on the other hand can be made robust, used by an unskilled operator, measures and computes in a fraction of a second, gives repeatable results from one user to the next, and test parameters can be easily programmed and don’t require user intervention.
Eric Bogatin, during his days as CTO at Gigatest Labs, did compare Polar TDR and VNA measurements over a range of frequencies up to around 6 or 7 GHz and demonstrated agreement throughout the range was well within the limits of accuracy of the two instruments. The frequency limit was the result of connector limitations. Eric didn’t document this but does recall it along these lines.
In theory, line impedance quickly drops to a stable level, as shown in the following charts. Er may decrease with frequency; see the table (Fig. 2) of frequency-dependent parameters.
The dielectric constant Er de-rates a little with increasing frequency as suggested in the table below, but since Zo is inversely proportional to the square root of Er, that has very little effect on impedance. This is just a typical table for a no-name product. The root of 4.2 = 2.0494, the root of 3.98 = 1.995: a change of only 2.7 percent.
Using these data in a frequency-dependent solver, the impedance of the trace looks like this (note the additional 1.5 ohms and the fact that it’s essentially flat above about 800 kHz).
You may wonder why it dips initially. That’s because the current distribution in the trace cross-section begins to favor the trace side that faces the reference plane(s), instead of being more uniformly distributed around the four surfaces. Thus, moving close to the reference plane reduces loop inductance and increases apparent capacitance, both tending to reduce impedance.
The extra 1.5 ohms is due to the copper conductivity—resistivity, if you prefer–and skin depth at frequencies above a few kilohertz.
This resistance shows on the TDR trace as an upward slope along the length of the display (the longer the trace, the greater the resistance).
As I mentioned regarding coupons, some OEMs have discussed with me the inclusion of dedicated test or “dummy” traces into completed bare circuit boards for the purpose of on-board measurement of impedance. They wanted to do this out of concern that the panel edge coupons might not sufficiently accurately represent on-board trace conditions due to the coupon’s physical placement on the panels. Dummy traces can more accurately represent on-board dimensions and environment due to their co-location, and they do have other potential advantages, but have problems of their own.
Consider these issues:
- How can you tie together the reference planes without affecting the rest of the board? In use, boards carry coupling capacitors and are connected to very low-impedance power supplies.
- Using valuable board real estate for traces and test points on every board, thus increasing manufacturing cost.
- Testing the trace on every board (what is the point of having per-board test traces if you aren’t going to test everyone?) resulting in another cost increase.
Not so easily handled in the test area.
- Trace configuration (spurs,etc.) are likely to introduce unwanted and misleading waveform artifacts.
- Appropriate probe access to the trace and reference planes is practically impossible.
In a nutshell, board stripline traces are intended to achieve target impedances when loaded and powered. These conditions don’t prevail on a bare board, so on-board measurements are very probably misleading (read: impedance higher than target) unless extensive thought goes into the design of the test traces for the purpose. Hence the use of coupons.
Board manufacturers are in a better position to test striplines during the build process because at some stage in the build process, every stripline is a microstrip (before lamination). At that point in the process, traces and the single reference plane are more easily accessible to test. A field solver can predict the impedance of the trace at this interim stage of the build. If subsequent laminations are completed accurately, as designed, then the target finished impedance will be achieved.
You pay your money and you take your choice, but it’s easy to see why coupons remain the favorites.”
Again, I’d like to offer a special thanks to Polar’s Ken Taylor for sharing his insight into time-domain reflectometry, and for helping me help my customer.
VISIT OUR CONTROLLED IMPEDANCE PCB PAGE AND DOWNLOAD OUR CONTROLLED IMPEDANCE DESIGN GUIDE:Eric Bogatin, Gigatest Labs, impedance, Polar Instruments, TDR