What Leads to Signal Integrity Issues in a PCB?

by | Apr 1, 2020 | 0 comments

Perhaps the most important cause of signal integrity issues in a PCB is faster signal rise times. When circuits and devices are operating at low-to-moderate frequencies with moderate rise and fall times, signal integrity problems due to PCB design are rarely an issue. However, when we are operating at high (RF & higher) frequencies, with much shorter signal rise times, signal integrity due to PCB design becomes a very big issue.

Signal Integrity Issues in PCB Graphic

Generally speaking, fast signal rise times and high-signal frequencies increase signal integrity issues.

For analytical purposes, we can divide various signal integrity issues into the following categories:

  1. Signal degradation due to uncontrolled line impedance discipline
  2. Signal degradation due to line impedance discontinuities
  3. Signal degradation due to propagation delay
  4. Signal degradation due to signal attenuation
  5. Crosstalk on one conductor due to other conductors
  6. Issues caused by power and ground distribution network
  7. EMI and radiation from the system

Impedance Calculator by Sierra Circuits

Signal degradation due to uncontrolled line impedances:

Signal quality on a net depends on the characteristics of the signal trace and its return path. During travel on the line, if the signal encounters changes or nonuniformity in the impedance of the line, it will suffer reflections that cause ringing and signal distortion. Moreover, the faster the signal rise time, the greater will be the signal distortion caused by changes in uncontrolled line impedances.

We can minimize signal distortion due to reflections by reducing or eliminating line impedances changes by:

  • Ensuring that signal lines and their return paths act as uniform transmission lines having uniform controlled impedances.
  • Having signal return paths as uniform planes placed close to signal layers.
  • Ensuring that controlled impedance signal lines see matched source impedances and receiver impedances – same as the characteristic impedance of the signal line. This may call for addition of proper terminating resistors at the source and receiver ends.

Signal degradation due to other impedance discontinuities:

As we mentioned earlier, if the signal encounters a discontinuity in impedance during its travel, it will suffer reflections which cause ringing and signal distortion. Discontinuities in the line’s impedance will occur at the point of encountering one of the following situations:

  • When a signal encounters a via in its path.
  • When a signal branches out into two or more lines.
  • When a signal return path plane encounters a discontinuity, like a split.
  • When line stubs are connected to signal lines.
  • When a signal line starts at the source end.
  • When a signal line terminates at the receiver end.
  • When signal and return paths are connected to connector pins.

And, faster the signal rise time, the greater will be the signal distortion caused by impedance discontinuities.

We can minimize signal distortion due to line impedance discontinuities by:

  • Minimizing the effects of discontinuities caused by vias and via stubs by using smaller microvias and HDI PCB technology.
  • Reducing trace stubs lengths.
  • Routing traces in daisy chain fashion rather than multi-drop branches when a signal is used at more than one place.
  • Proper terminating resistors at the source and receiver ends.
  • Using differential signaling and tightly coupled differential pairs, which are inherently more immune to discontinuities in signal return path planes.
  • Ensuring that at connectors where discontinuity occurs, signal lines are made as short and signal return paths as wide as possible.

Signal degradation due to propagation delay:

Signals take finite times as they travel on a PCB from source to receiver. The signal delays are proportional directly to signal line lengths and inversely proportional to signal speed on the specific PCB layers. If data signals and clock signals do not match in overall delays, they would arrive at different times for detection at the receiver, and this would cause signal skews; and excessive skew would cause signal sampling errors. As signal speeds become higher, the sampling rates are also higher, and allowable skew gets smaller, causing greater propensity for errors due to skew.

  • TIP: Skew in a group of signal lines can be minimized by signal delay matching, primarily by trace length matching.

Signal degradation due to signal attenuation:

Signals suffer attenuation as they propagate over PCB lines due to losses caused by conducting trace resistances (which increases at higher frequencies due to skin effect) and dielectric material dissipation factor Df. Both these losses increase as frequency increases, therefore higher frequency components of signals will suffer greater attenuation than do the lower frequency components; this causes reduction in signal bandwidth, which then leads to signal distortion by the increase in signal rise time; and excessive signal rise time increase results in errors in data detection.

  • TIP: When signal attenuation is an important consideration, one has to choose the right type of low loss high-speed material and proper control over trace geometries to minimize signal losses.

Signal degradation due to crosstalk noise:

A fast voltage or current transition on a signal line or return path plane may couple onto adjacent signal lines causing unwanted signals called crosstalk and switching noise on the adjacent signal lines. The coupling occurs due to mutual capacitance and mutual inductance. In uniform transmission lines, a relative amount of capacitive and inductive coupling is comparable. If there are discontinuities in transmission lines, usually inductive coupling dominates, and switching noise results. And as always, faster rise time signals create more crosstalk and switching noise.

Crosstalk and switching noise can be reduced by:

  • Increasing the separation between adjacent signal traces.
  • Making the signal return paths as wide as possible, and uniform like uniform planes, and avoiding split return paths.
  • Using a lower dielectric constant PCB material.
  • Using differential signaling and tightly coupled differential pairs, which are inherently more immune to crosstalk.

Signal degradation due to power and ground distribution network:

Power and ground rails or paths or planes have very low, but FINITE nonzero impedances. When devices’ output signals and internal gates switch states, currents through power and ground rails/paths/planes change, causing a voltage drop in power and ground paths. This will decrease the voltage across the power and ground pins of the devices. Higher the frequency of such instances, and faster the signal transition times, and the higher the number of lines switching states simultaneously, the greater is the voltage decrease across power and ground rails. This will reduce signals’ noise margins, and if excessive, would cause devices to malfunction.

To reduce these effects, the power distribution network has to be so designed as to minimize the power system’s impedance:

  • Power and ground planes should be placed as close together and as near to the PCB surface as possible.
  • Multiple low inductance decoupling capacitors should be used across power and ground rails and they should be placed as close to device power and ground pins as possible.
  • Use device packages with short leads.
  • Use of thin high-capacitive cores for power and ground considerably increases capacitance and reduces impedance between power and ground rails.

Signal degradation due to EMI:

EMI increases with frequency and faster signal rise times. Radiation far-field strength increases with frequency linearly for single-ended signal currents, and squarely for differential signal currents.

For more design information, check with our DESIGN SERVICE team.


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