An electronic system consists of printed circuit boards (PCBs), integrated chips, interconnect, and I/O cables. At high frequencies depending on the length of the interconnects and the current carried by the conductors, the interconnects tend to act as antennas, resulting in EMI. These EMI radiations interfere with other devices present in the vicinity. There are international standards that limit the level of emissions. Thus, it is highly important to measure electromagnetic radiation and control these radiations.
So, any product having wires/traces and operating at high-frequency has the tendency to radiate radio waves. This is the reason why EMI/EMC study and analysis is important. Does your product’s radiation disturb other devices present nearby? Whether it is within the set standards? Are the relevant EMI standards such as IPC CISPR standards achieved? In this article, we will cover the PCB design guidelines using which EMI and EMC can be controlled/avoided.
- What are EMI and EMC in a PCB?
- EMC compliant PCB design
- What are the Sources of EMI?
- Design guidelines for EMI and EMC reduction in a PCB
- Testing EMI/EMC in a PCB design
- What are the EMI/EMC Standards? (CISPR)
What are EMI and EMC in a PCB?
Electromagnetic compatibility (EMC) is the ability of an electronic system to operate within an electromagnetic environment satisfactorily without generating intolerable EMI (electromagnetic interference) in nearby devices/systems. EMC ensures that the system must perform as intended under the defined safety measures.
EMI is an electromagnetic disturbance, where energy is transmitted through radiation/conduction from one electronic device to another and corrupts the signal quality causing malfunctioning. EMI focuses on the testing requirements and interference between the neighboring equipment. It can occur in any frequency range, say anything more than DC. Typically, it happens above 50MHz. Read understanding signal integrity in PCBs.
Whenever a device deviates from the defined standards, EMC/EMI dominates the system performance. So, it is vital to control EMI during the initial phase of the PCB design. Controlling EMI in later production stages can be risky in cost terms. For EMC-friendly board designing, your primary concern should be on component selection, circuit design, and PCB layout design. To be market-ready, your product has to pass the prescribed EMI/EMC standards.
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EMC compliant PCB design
Applying the best EMC practices to PCB design helps to achieve compliance with EMC standards at a much lower rate than alternate EMC measures at a higher integration level. When can you call a PCB design EMC compliant? Well, EMC compatibility depends upon three perspectives:
- It should not interfere with other systems.
- It should not show sensitivity to emissions from other systems.
- And, most importantly, it should not cause interference with itself.
What are the sources of EMI?
There are two types of electromagnetic emission; conducted and radiated emission. Conducted emission enters the system through power input lines and cables. While, the radiated emission happens due to electromagnetic waves from power and communication lines, switching devices, and electrostatic discharges. It propagates through the air from electronic devices and traces, to interfere with other electronic systems. Examples are mobile and laptops interfering with aircraft electronics. Conducted interference can be mitigated by introducing line filters connected close to the power input or near the connectors. Another effective method for reducing conducted interference is using a ferrite core/ferrite ring. Ferrite core employs high-frequency current dissipation in a ferrite ceramic to build high-frequency noise suppression devices.
Electromagnetic emissions may also occur from high-frequency traces. Similarly, they can generate from power and ground planes, due to poor decoupling practices. This also results in unintentional currents, such as common-mode (CM) and differential-mode (DM) currents.
Can you recall Faraday’s law from your previous classes? Faraday’s law states that the magnetic field generated by a coil is directly proportional to the area of the coil and the current.
E = di/dt ∝ Coil Area ∝ Current going through the coil
Now, the first thing, which becomes critical is, reducing the coil/loop area. When this loop area decreases, the magnetic flux will also reduce. Now, the question is, how we can do it? Let’s say, we have a trace on the top PCB layer, we can reduce the loop by placing a ground plane directly under the trace/signal. So, when we do this, the current goes through the trace following the device and returns through the ground plane. The thickness of the PCB is around 3 mils (3000th part of an inch), and thus the area becomes very small. This is how placing the ground plane exactly below the trace reduces EMI because it reduces the overall area to be traversed.
The second thing is minimizing the rate of change of current since higher current causes more emissions. So, if you reduce the current, EMI can also be reduced. Maintaining low rise times, even if your PCB is operating at high-frequency, can also be helpful for EMI reduction.
Avoid Impedance mismatching: A properly designed system always comes with matched impedances from the source, to the transmission line, and the load. It provides maximum power transfer and minimizes reflections. Reflections on the transmission line increase harmonics, which increases radiated emissions. Unmatched impedances cause ringing and overshoot in digital signals, resulting in more radiated emissions. Properly matched impedances are required because they reduce the radiated emissions from the device. Want to learn more why impedance controlling/matching is vital? Read Why controlled impedance really matters.
Design guidelines for EMI and EMC reduction in a PCB
How to design a board with low or absolutely zero electromagnetic interference? Well, it isn’t impossible. The below design practices will make sure you do not create antennas, which will emit electromagnetic energy. These best design practices will reduce the length and area of the potential signal return paths that may increase unwanted EM emissions. The multi-layers stack-up will play a critical role, particularly in high-power and digital applications. Signal traces from components to the processor should be properly routed to avoid any return path, which could lead to common-mode signal generation.
The use of surface-mount devices (SMD) instead of leaded devices will further reduce EMI/EMC issues. Surface-mount devices (SMD) offer lower inductances in comparison with RF energy. Additionally, SMDs offer higher density due to closer component placements. This is particularly critical in a two-layer or four-layer circuit boards. However, the rising complexity in the PCB design will create more problems associated with line spacing or trace spacing. The dense physical dimensions of SMDs will offer more effective noise-control. Collect more information on surface-mount devices in this article The Advantages and Disadvantages of Surface Mount Technology (SMT).
Leaded components with higher inductances will generate a resonant frequency of more than 100MHz. Therefore, the adoption of a large number of through-hole components is not recommended as they generate excessive noise. There are no hard and fast rules for PCB design. Some design rules apply to a certain type of board but not feasible for other types. Nonetheless, at Sierra Circuits, we have curated some general PCB design rules, common to all board types.
1. Trace spacing and layout
Traces are the conductive paths that carry current from the driver to the receiver on the PCB. When these traces come across any bend or cross, they form a fully radiating antenna. Some common trace design rules are:
1.1 Trace separation: All signals (clocks, video, audio, reset, etc.) must be separated from other traces. the general rule says that the separation between the traces should be 3W, where ‘W’ is the width of the trace. This practice helps to reduce crosstalk and coupling between adjacent traces on the same PCB layer. Differential traces are an exception to this rule. Read our post on how to avoid crosstalk in HDI substrate.
1.2 Avoid right-angle and adopt 45° turn: When a trace encounters a 90° bend, the capacitance increases, resulting in the change of characteristic impedance value, which leads to reflections. It can be avoided by replacing sharp bends with 45° turns.
1.3 Route differential traces closely: It increases the coupling factor and keeps the noise in common mode. For example, let us assume two wires, which are placed close to each other. Any external noise intervening with these two traces will add the same amount of disturbance in both the traces. If trace 1 has 1 V and trace 2 has 1.5 V then the difference would be 0.5 V. Since, the external noise is same on both the traces, say 0.1 V. Because of this, trace 1 will become 1.1 V and trace 2 will become 1.6 V. And when you calculate the difference, it is still the same that is 0.5 V. So, the noise will actually cancel out. That is why high-speed signals are preferably routed as differential pairs. Need more insights on high-speed PCB routing? Go through our post on 11 best high-speed PCB routing practices.
1.4 Use vias like a pro: Vias are used in multi-layer PCBs for signal routing purposes. A good designer must know that each via comes with its capacitance and inductance effect. So, vias should be avoided as far as possible and critical traces should be routed on the same layer. Because of the parasitic capacitance and inductance in the vias, there is an impedance mismatch between via and trace, which creates reflections. When vias cannot be avoided, it should be ensured that ground vias should be placed close to the signal vias. This will ensure that the signals are referenced to connected grounds and this reduces the change in the characteristic impedance value and thus reflections. In differential pairs, when vias cannot be avoided, the same number of vias should be put in both traces.
Tip: Avoid vias in differential traces. If you have to then use anti-pad shared by two vias to minimize parasitic capacitance.
1.5 Avoid stubs in sensitive and high-frequency traces: Stubs produce reflections as well as the potential of adding fractional wavelength antenna to the circuit. To understand how via stubs add to reflections, check this post on via stubs and their effects.
1.6 Use guard and shunt traces for clock lines: In clock circuits, decoupling capacitors are very important for suppressing noise propagating along the supply rails. Guard and shunt traces are used to protect clock lines from EMI sources, otherwise, such clock signals will create problems elsewhere in the circuit.
2. Ground planes
A ground with low inductance value is a crucial element during PCB designing for mitigating EMC problems. Increasing the ground area on a PCB reduces the ground inductance in the system, hence EM emission and crosstalk too. Several approaches are available when we need to connect the signals to the ground, but what is best? Before jumping to the best PCB design approach, let us discuss what is not at all acceptable? Never connect the PCB components randomly to the ground points. So, what is the recommended design approach?
2.1 Use full ground plane and ground grids: Use the entire ground plane since it offers the least inductance value when the signal returns to the source from the load. Although a ground requires a dedicated PCB layer, this may not always be possible in a two-layer PCB. In such scenarios, designers use ground grids, where the inductance of a ground grid depends upon the distance between the grids.
2.2 Avoid long return paths: As per Faraday’s law, how a signal returns through the system ground makes all the difference. When a signal takes a longer path, it creates a ground loop that forms a radiating antenna. A short return path has a lower impedance, which gives better EMC performance. Long return paths are responsible for greater mutual coupling resulting in crosstalk. Therefore, keep the return paths as short as possible and the loop area as small as possible. The current return path should be handled precisely. To understand more about this read How To Handle Current Return Path for Better Signal Integrity.
It is recommended to connect the device grounds directly to the ground plane. This will reduce the ground loops.
2.3 Use Faraday’s cage/guard ring to isolate the noisy environment: A Faraday cage is created by adding the ground on the edge of the PCB. The purpose is not to route any signal outside this boundary. This technique restricts the emission/interference within the defined limit.
2.4 Place high-speed circuits closer to the ground and low-speed circuits closer to the power plane.
2.5 Always ground the copper fill areas: Floating copper areas should always be grounded. Otherwise, it may act as an antenna, causing EMC issues.
2.6 Check for multi-power requirements: When a circuit requires more than one power supply, then it is the best idea to keep them separated by a ground plane. But multi-ground planes cannot be realized in single-layer PCBs. This problem can be solved by running power and ground tracks for one supply separated from the others. It will also avoid noise coupling from one power source to the other.
2.7 Be careful with split apertures: Split apertures that are long holes and wide vias in power and ground planes create a non-uniform area. This non-uniformity increases the impedance in power and ground planes.
Shielding is a mechanical technique that uses conductive/magnetic (or both) materials to prevent EMI in the system. A mechanical shield is a closed conductive container connected to the ground, which effectively reduces the size of loop antennas by absorbing and reflecting a part of their radiation. It can be used either to cover the whole system or a part of it, based upon the requirement. EMI/EMC shielding protects the signal transmission from external noise and prevents information loss.
3.1 Cable shielding: Cables that carry analog and digital signals create serious EMI issues. Their parasitic capacitance and inductance factors are responsible for this. EMI can be prevented by shielding these cables and connecting them to the ground at the front and back.
4. Arrangement of PCB layers:
EMC performance of a PCB also depends upon the arrangement of its layers. In the case of two or more than a two-layer board, one entire layer should be used as a ground plane. For a four-layer board, the layer below the ground layer should be used as a power plane. The preferred layer stack for the four-layer board is signal1, ground, power, and signal 2. The impedance-matched traces should be on signal1 as far as possible.
4.1 If a two-layer board is used and an entire layer of ground is not possible, then ground grids should be used.
4.2 If a separate power plane is not used, then ground traces should run in parallel with power traces to keep the supply clean.
4.3 When there are more than four layers, it is recommended to use PCB layers’ arrangement like signal layer→ ground/power layer → signal layer → ground/power layer → signal layer → ground/power layer → signal layer. That is to use alternate signal and ground layers. And, the number of layers should be even.
5. Segregate sensitive components
For an EMC-friendly design, PCB components need to be grouped according to the signals they are operating on, such as analog, digital, power supply, low-speed, high-speed signals, etc. The signal tracks for each component group should stay in their defined area. It is good to use a filter, whenever a signal has to flow from one subsystem to another.
6. Decoupling capacitor
When ICs are operating, they switch current at high-frequency, which results in switching noise in the power rails/traces connected to the IC. This noise if not controlled, will result in radiated emissions and thus EMI. The methods to reduce power rail noise is to place the decoupling capacitors close to the IC power pins. And, grounding the capacitors directly to the ground planes. The use of power planes instead of power traces will also reduce power noise.
7. Controlled impedance for transmission line design
When a circuit operates at a high-speed, the impedance matching between the source and destination becomes critical. If the impedance is not matched and controlled properly then it will cause signal reflection and high-frequency ringing. The excess RF energy generated due to ringing and reflection, will radiate/couple to other parts of the circuit, creating EMI problems. Signal termination strategies help to reduce these undesirable effects. Termination not only mitigates signal reflection and ringing by controlled impedance measures but can also slow down the fast-rising and falling edges of the signals. The impedance of traces also depends on the PCB materials used on the board.
Testing EMI/EMC in a PCB design
The electromagnetic emissions in an electronic system are measured by implementing various modeling techniques. The computer simulation is often regarded as the fundamental approach in EMC analysis. The computer simulation is performed via an integration technique to get an accurate measurement of essential parameters. Several steps are followed to test electromagnetic emission in an electronic system:
- The finite difference time domain modeling is implemented to measure the frequency response of the common-mode current during the high voltage applications.
- The common-mode current is evaluated by considering factors such as current-mode antenna impedance, and the distributed circuit constant.
- The electric coupling between the power plane and the ground plane will also impact the common-mode current.
Sierra Circuits measures the frequency response of electromagnetic emission from the stripline structure with the help of a high-end tool and our own proposed model. We understand the importance of keeping EMI out, thus we offer physical insights and design guidelines to keep your circuit safe and sound.
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Meeting EMI/EMC standards (CISPR, FCC section 15)
The objective of EMC/EMI standards is to maintain compatibility between the co-located electrical and electronic system for trouble-free operation. CISPR standards are applicable to all products, systems, and installations. They are introduced following the Federal Communications Commission (FCC) Section 15, and the European International Special Committee on Radio Interference (CISPR) regulations.
The standards define permissible limits for both conducted and radiated emissions and their classification into residential, commercial, light industrial, and industrial environments. To meet EMC requirements, the device must be tested for conducted and radiated emissions along with conducted and radiated susceptibility. An example of one of the tests is shown by a graph given below. There are limits on this graph, and the emission levels should be within the values mentioned in the graph.
An electronic circuit is made up of several electronic components arranged in a pre-defined manner. If the arrangement is not proper, then it may cause various EMI/EMC issues. The design of a PCB for any component has a major effect on its EMC performance and the amount of EMI generated. While designing a PCB, you need to be mindful of each component’s EMI/EMC effect. Good EMC performance can only be achieved with good PCB design practices, where a designer has to either eliminate the interference source or protect the circuit from its adverse effects. Eventually, the goal is to maintain the intended functionality of the circuit board for better EMC.
Electromagnetic compatibility of any electronic circuitry is associated with the generation, propagation, and reception of electromagnetic noise. Electromagnetic noise is not a welcomed character in a PCB design. At Sierra Circuits, we take intensive care to ensure signals do not interfere with each other when it comes to traces, vias, and even PCBs operating in unison. EMC improvements with accurate PCB design do not add extra cost to the final product that is why it is recommended during the initial production phase.