HDI PCBs May Be Worth the Additional Cost

The Hidden Economy of HDI

When I mentioned during our regular Wednesday meeting that HDI would be the focus of the May issue of The PCB Design Magazine, our VP of manufacturing, Steve Arobio, and Atar Mittal, who directs design and assembly, insisted this column must explain, once and for all, the economy of buried vias.

“The common wisdom,” Steve said, “is more laminations equal more cost, and it’s really hard to break that myth.”

Atar and Steve are too tactful to call any design simpleminded, but I can tell you they see attempts week in, week out, to steer clear of buried vias no matter the results; and sometimes the results can’t be manufactured.

“Why, I ask customers, would you simply add layer after layer and make holes smaller and smaller as your circuit designs become more complex? Why would you gamble on high via aspect ratios and tight hole-to-copper clearance?” Steve wondered.

“Why not turn to a blind-and-buried via architecture and achieve 8-mil hole-to-copper clearances, instead of 3 or 4 mils; aspect ratios that are 8:1 instead of 20:1; and use fewer layers?”

More Than Simply Layers and Laminations

Yes, multiple laminations cost more than a single lamination, but that’s merely one factor to consider in a thorough cost-benefit analysis when developing a stack-up. First, let’s distinguish between prototype fabrication and production runs.

“You have to hammer home to designers that they just can’t keep adding layers, making everything smaller, and figure the fab will just have to deal with it,” Steve advised. “Think strategically. Concentrate on yield from the beginning.” If you focus on the lowest installed cost, at some level of circuit complexity, you will have to carefully assess the cost of HDI construction versus not using HDI.

When a shop that specializes in prototype manufacture quotes a job for, say, 10 boards, and accepts the order, the shop is duty-bound to produce them, even though they may push the edge of process tolerances. A six-layer design with 3-mil drill-to-copper clearance might be produced readily, but holding registration in a 12-layer board with that spacing could be a very different story. Perhaps the manufacturer has to make 20 boards to yield 10 that are acceptable; perhaps the job has to be run twice. If there’s a delay shipping the prototypes, what is the cost of that delay to the product development and introduction? What expense is incurred if temperature cycling causes eight of those 10 marginally good boards to short during use?

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If the shop that gambled on building the 12-layer design had to make 20 boards to deliver the 10 ordered (and was able to deliver them on time), the shop would have to absorb the 50% waste and bill the customer at the price quoted. However, if the customer needs another batch, maybe with a few changes but the same basic architecture, the shop would then adjust the price to compensate for the 50 percent yield. Still, for 10 revised prototypes that are urgently needed, the customer may have no choice but to pay the price increase or stall development. Too much has been invested in the design at this point to start fresh; moreover, the market window for the new product would close.

If the revised prototypes survive testing, and the design is approved for production, the customer faces, at best, a 50% manufacturing yield: 10,000 boards would have to be fabricated to get half that many usable bare boards, and there would be some additional loss in assembly. Inevitably, yield is the paramount cost consideration in PCBs, and somebody pays for it. The prototype fabricator who agrees to build the first order swallows the yield loss, hopefully at some profit. But the customer pays the freight from the next iteration through production.

When HDI Design Is Worth the Extra Cost

“You have to hammer home to designers that they just can’t keep adding layers, making everything smaller, and figure the fab will just have to deal with it,” Steve advised. “Think strategically. Concentrate on yield from the beginning.” If you focus on the lowest installed cost, at some level of circuit complexity, you will have to carefully assess the cost of HDI construction versus not using HDI. Atar recalled a recent case. We were asked to build a 12-layer board that incorporated several BGAs with a 12×15 ball matrix on a very tight pitch. This was a through-hole, single-lamination design from a frequent customer, which we agreed to take on conditionally as an experiment. It was about 0.93 inches in thickness.

The design called for the smallest holes we could drill, which exceeded what we normally should be drilling, yet the hole-to-copper clearance was only about 3 mils. We made a few boards, but it was impossible to produce them with any reliability. “They boxed themselves in, proceeding from the strategy a conventional architecture would result in the cheapest board,”Atar explained. “Once they’d committed to that, they couldn’t avoid the predicament.”

If BGAs with a ball pitch of less than 0.5 mm are involved, you should always consult with a board manufacturer before commencing layout. The end-product will disprove the adage about the value of free advice.

Although the customer who brought us the 12-layer design was long past the stage for advice, Atar decided to explore how it could be best architected for manufacturability as an exercise for this column.

“The board as it was designed had 2.5-mil to 3-mil traces inside the BGA matrices, and a plane mesh within the BGA with 2-mil connecting segments,” he pointed out. Each package involves about 80 signal lines.

soldermask
Figure 1: This alternative 2-4-2 stackup would receive all the manufacturing pitfall of a 12-layer single-lamination design that resulted in 3-mil drill-to-copper clearance.

“This design could easily be redefined as an eight-layer, 2-4-2 HDI board with two sequential laminations,” Atar concluded. “All drill-to copper criticality would vanish with the HDI architecture. Traces can be healthy 4 mils to 5 mils, or even wider, because no traces have to be threaded between adjacent vias in pads.”

If the customer had created the layout on the stackup shown in Figure 1, boards could easily be manufactured with excellent yield and four fewer layers. The exercise consumed very little time.

Don’t travel alone and head down a one-way street with no return. Ask for a little help before the journey and you’ll have a great trip. Cheers!

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