Steve Sandler at DesignCon 2016

Join Steve Sandler, CEO of Picotest, during his DesignCon presentations next week! Sandler was named the Jim Williams contributor of 2015 at the ACE awards in San Jose, and he became the 23rd Keysight certified ADS expert in the United States. He will be speaking for several sessions at DesignCon. All of them look great, but we’re particularly intrigued by “Killing The Bode Plot,” a can’t-miss session at the Chiphead Theater on Wednesday, January 20.

Killing The Bode Plot
Chiphead Theater
Wednesday, January 20
4:45 — 5:25 pm

Abstract:
For the first time, Picotest will be presenting on their unique non-invasive stability solutions at the Chiphead Theater. Many new linear devices, including voltage references, voltage regulators and opamps have internal feedback loops, prohibiting traditional bode plots. Yet, the assessment of stability is critical, since it directly impacts system performance, including clock jitter and system noise. This session takes a look at a non-invasive stability assessment. The theory behind the measurements, how accurate it is and measurement demonstrations for a variety of devices and setups.

Picotest will be presenting six other sessions at DesignCon. The Power Integrity Bootcamp Courses sold out almost immediately, but there are a few “audit seats,” and a standby list for those interested the sessions. Limited seating is available for Introduction to Power Integrity and Advanced PI and SI Co-Simulation Skills. On Wednesday, they also have Speed Mentoring, 7:00 — 8:00 am, and a Power Integrity Meetup, 12:45 — 1:30 pm.

Reducing Noise in Power Distribution Networks on Time and in Budget
Ballroom B
Tuesday, January 19
4:45 — 6:00 pm

Panel Speakers:
Sam Chitwood — Product Engineer, Cadence Design Systems, Inc.
Tom De Muer — Principle Software Architect EM Simulations, Keysight
Dan Oh — Architect, Altera
Steve Tarnovich — Editor-in-chief, Planet Analog & Senior Technical Editor, EDN, UBM
Steve Sandler — CEO, Picotest.com
Vishram S Pandit — Evaluation of PDN coupling on SOC, Intel

Circuit Bloopers and Lessons Learned
Chiphead Theater
Thursday, January 21
2:30 — 3:10 pm

Abstract:
In this lighthearted recap we’ll share some of the stories, design faux pas, and sometimes painful circuit bloopers just because worst case happens every day.

Target Impedance and Rogue Waves
Ballroom GH
Thursday, January 21
3:45 — 5:00 pm

Panel Speakers:
Dr. Eric Bogatin — Director (Front Range Signal Integrity Lab), Teledyne LeCroy
Istvan Novak — Senior Principal Engineer, Oracle
Larry D. Smith — Principal Power Integrity Engineer, Qualcomm
Steve Sandler — CEO, Picotest.com
Brad Brim — Product Engineering Architect, Cadence Design Systems

Evaluation of Gallium Nitride MOSFET for VRM Designs
Ballroom C
Thursday, January 21
9:20 — 10:00 am

Session Speakers:
Venkatesh Avula — Research Assistant, The University of Idaho
Steve Sandler — Managing Director, Picotest

Have you registered for DesignCon yet? Sign up for your free expo pass today!

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