A schematic diagram is a logical and visual representation of an electrical circuit. It is the very first step of electronic product design. Earlier, designers used to draw the circuit diagram on paper. Now, they have started to use PCB design tools (M-CAD and E-CAD) which have simplified the design process. It is advised to designers to follow standard schematic guidelines to have a well-structured and error-free design.
Today, designers use numerous EDA (electronic design automation) tools such as Altium, Allegro, Pads, Kicad, Tinycad, Express PCB, and so on. These design tools ensure that the schematic circuits are error-free as they continually monitor logical and connection errors. Designers need to follow a standard design rule to make the circuit machine-readable.
In this article, we will be looking at the following points:
What is the importance of a schematic diagram?
Schematic is one of the important aspects of PCB design. A good schematic shows a well-structured circuit diagram clearly depicting the electrical connections between various electronic components. It should also be noted that a technically correct but crowded schematic is still a bad one as it might confuse designers. Schematics can be an extremely valuable troubleshooting tool as it traces out the connections in the circuit.
Guidelines to draw a PCB schematic diagram
To achieve a successful design, follow these standard schematic guidelines.
Page size selection
Most of the design tools offer different page sizes. Generally, the tools would select the page size as A4. However, it should be noted that various other page sizes are also available. Designers should select the size based on the size of their circuit design.
Page naming convention
The logical blocks of the schematic should be separated by pages. The pages can be named using the letters A, B, C, and so on. By doing this, we can place the pages in alphabetical order. An example of such a naming convention is shown below.
- A_Block Diagram
- B_Power supply
- C_ MCU interface
- D_Memory interface
- E_ Revision history
Block diagrams and revision history are often ignored by most designers to save time. However, they can be very helpful for other designers trying to understand the schematic. Most of the product-based organizations mandate all such protocols and regulations.
Though it is not a direct requirement of the designer, the tool needs to have some references. Hence the grid system is followed. Having grids helps the designer to reference the parts properly and make their connection. Circuit components and connections must always be on the grid, this helps in probing the nets during analysis.
Page title block
The page title block is present in the footer of the schematic page. It is a good practice to fill in all the required details such as page size, update date, revision, document number, name/function of the circuit, and company disclaimer. An example of the title block is shown below.
Designers need to write necessary comments concerning the circuitry. The notes can be written on either independent documents or schematic pages. Generally, notes are provided on a separate page for complex designs. Examples of notes could be jumper status, PCB layout constraints/guidelines, and so on. A schematic with notes can be seen below.
Revision history contains the changes that are made to the design. This document provides information such as the date and description of the changes made, the name of the author and the reviewer, and review comments if any. Revision history is generally placed on the first or last page of the schematic. An example of schematic revision history is shown below.
Schematic document table of contents
The table of contents lists the topics present in the schematic document. Having this page helps designers easily locate a specific module in a complex and large design. This can be skipped if the design is small and simple. An example of a ToC is given below.
The block diagram represents the different modules in the design and signal flow. This greatly helps the reviewer to understand the design for review purposes. An example of a schematic block diagram can be seen below.
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Hierarchical schematic design
If the design is complex and contains many modules, it is preferred to have a hierarchical design. The hierarchical schematic clearly displays the signal flow from one module to another as shown below. A detailed view of each module can be accessed by clicking on the respective module in the hierarchical schematic.
The table below shows the names of the generally used electronic components, and their corresponding reference designators used in any schematic. The designators are assigned as per the IEEE standard. It is recommended to name the components with its standard reference designators. Also, always use capital letters to designate the schematic symbols.
|Component||Reference designator||Component||Reference designator||Component||Reference designator|
|Resistor||R||Plug /Connector||P/CON||Power supply||PS|
|Capacitor||C||Jumper||Jp||Crystal||X or Y|
|Zener diode||Z||Test Point||Tp||Heatsink||H|
|IC (Integrated Circuit)||U/IC
The schematic diagram consists of different types of components such as active components, passive components, and connectors. Active components include transistors, diodes, logic gates, processor IC, FPGA, Op-amps, and so on. Components like capacitors, inductors, and transformers are referred to as passive devices. Creating new symbols is not advisable unless the symbol for that component is not present in the standard library.
To learn more, check out How to Create a Schematic and Symbol Library in KiCad.
Resistors can be represented in two different ways as shown below. Care should be taken by designers to keep up the consistency in the symbols used.
The unit of the resistance is ohms and is represented by the symbol ‘Ω’. Sometimes, the symbol ‘Ω’ can be replaced with the letter ‘E’. Designers should ensure that consistent unit representation should be followed in the entire design. All required data about the components should be entered in the design tool. This makes it easier to create BOM (Bill of Materials) at the end of the design.
Polarized and non-polarized capacitors
Capacitors have two terminals, one positive and one negative. Care should be taken to mark the polarity of these terminals. Error in the polarity of the capacitor terminal might lead to exploding. The figure below shows the capacitor symbols from IEEE standards.
Designers should also ensure that the pin numbers assigned to the symbols should exactly match the footprint layout.
A transistor is a three-terminal semiconductor device. The terminals are base, collector, and emitter. Designers should always refer to the component datasheet while mapping the pins in the footprint layout to the schematic symbol.
When the symbols are created, it is important to enter a description of the component. This is very useful for future reference or when the part is obsolete and needs to be replaced. Having these details on the BOM improves the readability. The below two images show completely filled description fields of a transistor symbol.
It is very important to create the symbol of op-amp as per the IEEE standards. Many designers often draw the op-amp as per their convenience which tends to lose readability. This may happen due to lack of understanding and experience of CAD schematic tools.
When you create a symbol, it is recommended to have all the input pins on the left and all the output pins on the right. Similarly, power and ground pins can be placed at the top and bottom respectively. In the image shown, the input pins are 2 and 3, the output pin is 4, power and ground pins are 7 and 4, respectively.
Designers should be careful while flipping or changing the orientation of the symbol. When we do so there is a good chance that positive and negative terminals switch their positions. Hence care should be taken to cross-check each symbol with the manufacturer’s datasheet.
Heterogeneous schematic symbol
Complex devices such as FPGA, memory, microprocessor are called heterogeneous components. These components have different types of pins in large numbers such as data lines, inputs/outputs, address lines, control lines, and power lines. To retain clarity and readability, it is expected that designers should create multiple components of a single package such as UxA, UxB, UxC, and UxD. An example of such a heterogeneous schematic symbol of a component is given below.
Power and ground symbols
The symbols of power and ground pins are shown below.
It is always a good idea to represent voltages with a ‘+’ sign since there could be negative voltages present on the board. Designers should follow a standard and consistent convention to represent the voltage levels and their section inside the silicon. For example, +3.3V_IO, +3.3V_DG, +3.3V_AN +1.8V_Core, +1.2V_LVCore, +2.5_Vref etc.
Similarly, different types of grounds could be present on the board. The symbols are shown below.
Whenever you have two wires that form a junction and share an electrical connection, that intersection needs to have a junction dot. This is a standard practice in every schematic design.
Net labeling conventions
The objective of a schematic is to make your circuitry easier to understand for designers. Unnecessary net connections should be minimized. This is commonly observed when drawing the symbol of an integrated circuit (IC) on a schematic.
Rather than drawing dozens of nets all over the place, designers signify a net name for a specific pin, which is associated with a pin on another device. These pins will have the same name. Pins with the same name are assumed to be connected. This improves the readability of a schematic. The below image shows a series of named nets.
Net labeling guidelines
When nets are connected on the same page directly to another IC, net naming is not required. However, if a net is to be connected to an IC that is present on another page, then you would require to name it.
Designers can follow these simple rules while naming the nets:
- Signal names should always be written in uppercase and should be placed just above the net.
- Avoid long names. Preferably, the names can have a maximum of 4 letters.
- Describe active low or high signals using the upper bar. A pin with an upper bar is considered to be an active low pin.
- Open nets/connections should be removed.
To improve readability, designers normally name the nets in the schematic. This works fine when the signal is to be connected on the same page. If there is a requirement to connect the net to a pin that is present on a different page, an off-page connector symbol should be used.
Signal flow representation
On a schematic page, the signal flows from the left to right side of the page. Any power and ground connections are shown on the top or bottom side of the page. Designers are advised to keep this in mind and to keep components accordingly.
Component placement in a schematic is one of the important tasks. This is because the layout engineer is going to keep the components accordingly. The parallel connection of the capacitors is shown on the left. As we can see, the readability of the schematic is not up to the mark.
To improve the readability, the connection can be made as shown below.
Also read, How to Place Components in KiCad.
Crystal placement in the schematic is always made as shown below. The components connected to the crystal are always placed near it as the signals could be of high frequency.
Design Rule Check (DRC) is an intelligent feature offered by CAD software to check both the logical and physical integrity of a design. Checks are made against all enabled design rules and can be made online as you design.
The netlist is generated when the schematic design is complete and ready to be imported in layout. Netlist files can have two different extensions (.mnl and .txt). The .mnl file is machine-readable. The .txt file displays all the connections/nets between the component pins. It is recommended to manually verify the nets to avoid design errors.
Bill of material (BOM)
Currently, CAD tools provide a key feature called BOM creation. A complete and sufficient BOM can be generated only if designers have provided all the inputs in the tools while creating or importing components from the library. The inputs to the BOM could be MPN (Manufacturing Part Number), package, vendor name, vendor part number, and so on. It is recommended to provide all the required information during the symbol creation.
The schematic checklist is the most often ignored point in schematic creation. This is more related to the process of the organization which is set based on past design experiences. Having a checklist avoids errors in the schematic and makes the design robust. Below is the checklist.
- Pin numbering and labels should be verified for each component concerning the datasheet.
- A polarity check should be made for all the polarized components.
- Check for overlapping labels and pin numbers.
- Verify the base, collector, and emitter pins of all the transistors with the datasheet, schematic symbol, and footprint package.
- Validate the component’s value, reference designators, and location.
- Ensure that schematic symbol descriptions are present. (MPN, vendor name, vendor part number, and so on).
- Check for off-page connectors.
- Look for inter sheet reference.
- Decoupling capacitor checks for all ICs, ground pin separation based on the signal type (analog, digital, signal, ground).
- BOM checks for quantity and part number.
When a designer draws a circuit in a CAD tool, it should be noted that schematic design is an input to the layout designer. The layout designer expects an error-free schematic so that the layout is well-structured and accurate.
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