Steve Sandler: “Power integrity is the fundamental basis of all high-powered and high-fidelity systems”
Keynote speaker and power integrity master Steve Sandler from Picotest answered our questions during DesignCon 2018. He talked about power integrity, signal integrity, EMI, and the role of connectors.
0:07 What are your thoughts on this year’s DesignCon?
The power integrity is really blossoming this year. You can see it in all the events. There was standing room only in one of my events the other day. There were people sitting in all three aisles. What happened between last year and this year I don’t know. But this year power integrity is a thing.
0:27 Why is power integrity so important?
Why is power integrity so important? Well, there’s a couple of reasons. Number one is that power integrity really is the fundamental basis of all of our high-powered and high-fidelity systems. So, if I don’t have good power integrity we might know that that means the CPUs aren’t going to get the right voltage or the FPGAs aren’t going to get the right voltage, but it’s so much more than that. Clock jitter is dependent on having very low noise power supplies. Phase locked loop are very sensitive to power supply noise. EMI is heavily influenced by power rail noise, so power rail noise is really as fundamental to the performance and optimization of the system.
1:12 How does power integrity affect the overall signal integrity?
So, how does power affect signal integrity? One of the ways is that the power rail noise actually gets into the phase locked loops on the reference clocks and impacts the jitter. The way that it impacts jitter tends to close the signal eyes. And so it’s not possible for us to get good signal eyes if we don’t have good power integrity.
So what are the challenges in measuring 32 gigabits? There are a couple of things that really get in the way and, interestingly, Heidi Barnes (Keysight Technologies) and I did a paper on this, just yesterday, and in the paper we didn’t actually have much power integrity issues with the 32 gigabits and the reason is that the 32 gigabits transceiver is a full differential transceiver and so most of the power rail noise is canceled by the differential effect. What was really interesting that just turning on the transceiver turned out to be quite a challenge for the power supply and we couldn’t actually turn the transceiver on, but once we got the transceiver on it was fine.
2:17 Why is there such a big problem turning on the transceiver?
So the transceiver itself doesn’t really have a lot of high-frequency content, but the transceiver actually draws an operating current of about 600 milliamps. So, when you turn on a transceiver you enable the transceiver, you end up with a 600 milliamp step that’s as fast as the FPGA transisters, so blazingly fast, goes from 0 to 600 milliamps. The FPGA can’t tolerate more than 10 millivolts of noise when that occurs. When you have more than 10 millivolts of noise it gets into the phase locked loops and it bothers other parts of the FPGA and there are 4 of these transceivers, so if we turn on 4 transceivers that say you’re allowed 10 millivolts for 2 and a half amps, that’s a very low impedance bus. Quite a challenge.
2:58 So, how do you get around that?
One thing that you can do is design a very low impedance power supply. Unfortunately, most people don’t think of transceivers as needing very low impedance power supplies, it’s just the transceiver. So, it really needs a very low impedance design to begin with. The second problem, and actually the problem that we encountered, or one of the bigger problems we encountered in this particular transceiver, is the power supply connected to the motherboard through a connector and the inductance of the connector was so high that when the transceiver turned on the power couldn’t overcome the connector itself. That’s really shocking that the 32 gigabits doesn’t work because of the connector, but that was the case.
3:40 Do connectors play an important role at high frequencies?
Yeah, connectors play a huge role at high frequency but also at low frequency. The interesting thing about this connector, or one interesting thing about this connector is that it was a Samtec connector and Samtec builds very good connectors. Samtec makes S-parameter models for all of their connectors so you can simulate them. Except power connectors. Why not power connectors? Because power is just DC, right? And so there is no model of that Samtec connector, nobody realized what a challenge it would be and connectors play a very big role, not only at high frequencies but even for VRMs.
4:22 Can you summarize your keynote presentation?
I gave the keynote speech here on Tuesday, and the keynote speech I gave on Tuesday talked about the fact that we have signal integrity engineers, we have power integrity engineers, and we have EMI engineers. When you get down to it they’re all really measuring the same exact thing, but they’re measuring it in different ways. It’s fascinating but we have different words for the same things. We speak different languages, so we can’t talk to each other, but the resonances and power planes of sources of the signal integrity and the EMI, they’re all the same thing. If we can get the impedance to be well controlled and flat we have good power integrity, we have good signal integrity and we have good EMI performance, and the challenge is getting all 3 of those to be good at the same time.
5:11 Should we look at it in an integrated way?
This is my favorite subject. I call this the holistic ecosystem. So, what I teach in my workshops is that we have to do this holistically. You can’t design power integrity without worrying about signal integrity and EMI. Here’s a fascinating statistic. My company did six workshops around the country last year in conjunction with Rohde and Schwarz. One of the questions we asked everyone in the workshop is “what is your area of specialty?” This is a power integrity workshop. 10% of the people in our workshop were related to power. 90% of the people in our power integrity workshop were not. I mentioned this to Eric Bogatin before his tutorial here yesterday and he asked the same question in his tutorial, “how many people here are power integrity people?” 10%, and so what this tells us is power engineers design their power supply, they don’t really worry about anything else, they throw it over the wall, the signal integrity guys and the EMI guys say “oh my god, it doesn’t work!” And they come to the workshop to learn how to fix it.
The 2023 challenges
These three areas all do affect each other and the conclusion of my keynote, which was about what challenges are we going to face in 2023. I said in 2023 we just get a little bit more concentrated than we are now. Circuits get smaller, performance requirements get higher, budgets go a little lower, design cycles get shorter. There’s no way in 2023 that you just get by. You either have an optimum design, or you don’t. There’s not going to be “just get by.” So what that means is that these three areas, signal integrity, power integrity, and, EMI are going to need to learn how to talk to each other. One of the ways that we’ll do that is through simulation and that’s one of the reasons that I work so closely with Heidi Barnes at Keysight, is that we can tie all of these areas together through simulation and ADS is a very powerful simulator that’s capable of assessing powering integrity, signal integrity, and EMI simultaneously.
7:25 Will simulation be fundamental?
Yes, simulation will become the fundamental center point that ties together signal integrity, power integrity, and EMI, but there’s another aspect to this also, and I teach a lot of workshops in Detroit and I feel for Detroit. Automotive engineers have a very tough life, they have a new design every year, the dates are fixed, you’re not going to hold back the model year, they have to have the latest technology, they have very short design cycles, a very, very tough world.
They say to me, “Steve, how do we save a board spin? We’ll pay you any amount of money if you just save a board spin.”
And I said, “Here’s the secret, the secret is that if you want less board spins you have to make more boards.”
They said, “Wait a second, that doesn’t make any sense.”
I said, “It does, it makes perfect sense, and this is where Sierra Circuits gets involved.” So, before you design that VRM into your 20-layer circuit board you really need to know that’s a good VRM and that it meets the performance you need. So, I say you put that on an express prototype board, you evaluate the VRM and you say you know what I really like that VRM, and I know everything about it now, and now you can put it on a 20 layer board with confidence and you know that it’s going to work and I promise you that building those extra boards saves you a very expensive board spin and it made your design cycle shorter.
8:53 Why is DesignCon so important?
I have to say that I’m part of DesignCon since probably a decade. I think that one of the things that’s really a focus of DesignCon is that you’ll see signal integrity, power integrity, and EMI engineers here. So, even though we don’t speak the language we get to know each other. I think we’re building a rapport I think we are actually learning from each other. People ask me “what is it like being at Design Con?” And I say the same thing every year. It’s like drinking from two fire hoses at the same time.
9:22 What’s your favorite part about this year’s DesignCon?
What’s my favorite part about this year’s DesignCon? I would say it’s being the keynote speaker, but I don’t think that’s what you mean. Secondary to that, to me, it’s thrilling to see that power integrity has increased in interest so much over last year. It was fascinating to me to see all of the power integrity sessions jam-packed full with people sitting in the aisles. For me, that was really thrilling.