Our first HDI webinar is entitled ”An HDI Class with Sierra Circuits.” We recorded it at our Bangalore office in June 2019 with Vadiraj Kulkarni, Senior PCB Consultant. As the name suggests, this HDI webinar is actually a class. During the recording, we had our content writers Taisha, Rahul and Pankaj sit in the room with Vadiraj, as he was going through the slides. The goal is to make this online event interactive. Your feedback is more than welcome!
Doug Smith, the author of High-frequency Measurements and Noise in Electronic Circuits, led the latest IPC Designers Council at Cadence on April 26th. The topic was: Predicting field failure from small environmental stresses for high-quality PCBs.
Vias are miniature conductive pathways drilled into the PCB to establish electrical connectivity between the different layers. Basically, a via is a vertical trace in a PCB.
In her presentation at the Winter 2019 IPC Designers Council Silicon Valley, Natasha Baker, founder & CEO of SnapEDA, discusses the challenges of creating and maintaining high-quality PCB libraries, as well as the difficulties that engineers face when designing circuit boards.
Heidi Barnes discussed the roles of circuit boards with DDR5 with us at DesignCon. But that’s not all. She was also interviewed by Steve Sandler, a fellow power integrity master. Watch the video now!
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