How to Set Up Design Rules in KiCad

KiCad is one of the best open-source EDA tools empowering PCB designers with a robust platform for circuit board development.

To get the best out of it, you need to understand how design rules are set in KiCad. These rules include several PCB design elements, such as trace width, clearance, via size, and net classes.

In this tutorial, you’ll learn the step-by-step procedure for setting up PCB design rules in KiCad.

Watch the full video.

Steps to set design rules in KiCad

To access the design rules option in KiCad, navigate to the file menu and then board setup, or use the shortcut on the toolbar. In the board setup window, select design rules.

Step 1: Set the constraints

Constraints allow you to establish clearance rules such as minimum clearance, track width, and annular width. To access the constraints section, click on Constraints under Design Rules. 

The constraints section is divided into 7 segments, each allowing you to set various parameters. Below are the segments and their corresponding parameters

1. Copper: Minimum clearance, track width, connection width, annular width, via diameter, copper-to-hole clearance, and copper-to-edge clearance
2. Holes: Minimum through-hole diameter and hole-to-hole clearance
3. Microvias: Minimum microvia diameter (finished) and minimum microvia hole
4. Silkscreen: Minimum item clearance, text height, and text thickness
5. Arc circle approximated by segments: Maximum allowed error in line segments
6. Zone fill strategy: Minimum acceptable number of thermal relief spokes connecting a pad to a zone
7. Length tuning: Stack-up height in track length calculations. When utilizing a via during length matching, select this option to automatically consider the via height.

To import settings from an existing board design, click on Import Settings from Another Board and select the design file. Next, choose the settings you want to import and click on Import Settings.

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Step 2: Specify the custom dimensions for traces and vias

In the Pre-defined Sizes section, you can establish a library of pre-defined tracks and vias. This feature is essential for maintaining consistency and ensuring that frequently used sizes are readily available. This reduces the manual input each time you create a new track or via.

To add a new track, via, or a differential pair, click on the + button.

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Step 3: Group the nets using net classes

In the net classes section, you can create a hierarchical structure library for organizing multiple nets. Grouping the nets within a net class ensures uniform application of design rules to the entire group.

Every net in KiCad is assigned to a specific net class. If a net is not added to a specific class, it will automatically be included in the default class. To add a new net class, you click on the + button and enter the following details:

1. Name of the net class
2. Clearance
3. Track width
4. Via size
5. Via hole
6. Microvia size
7. Microvia hole
8. Differential pair width
9. Differential gap

Here, we have created net classes with the names Group1, Group2, and POWER.

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Step 4: Define the custom rules

This segment allows you to set custom design rules for your design.

Here’s a template to define a custom rule:

(version <number>)

(rule rule_name> <rule_cause>…)

(constraint <constraint_type>…)

(condition “<expression>”

(layer “<layer name>”)

(severity <severity_name>)

Version: Here, you just have to enter a number. The rules will be assessed based on the version. The latest version number will be considered for DRC.

Rule name: Choose a descriptive name for your rule that accurately reflects its purpose. Enclose this name within quotation marks. (rule <rule_name> <rule_clause>…)

Constraint: This clause defines the actions to be taken when the rule is triggered. You can include multiple constraint clauses to impose various constraints, such as clearance and track width, on objects that meet the same conditions.

Condition: It specifies which objects the rule applies to. It uses expressions to detail the conditions.

Layer: This defines the board layers to which the rule applies. You can use specific layer names or shortcuts like outer (for front and back copper layers) and inner (for internal copper layers). If no layer is specified, the rule applies to all layers.

Severity: Define the severity level for a rule violation. This defines how violations should be handled—whether as errors, warnings, exclusions, or ignored

Let’s look at an example from the syntax help dialog in KiCad. This rule sets a minimum clearance between vias of different nets.

(

rule “Distance between Vias of different Nets”

(constraint hole_to_hole (min 0.254 mm))

(condition “A.Type == ‘Via’ && B.Type == ‘Via’ && A.Net != B.Net”)

)

In this example,

1. Rule name: “Distance between Vias of different Nets”
2. Constraint: Minimum hole-to-hole clearance of 0.254 mm (10 mils)
3. Condition: Applies to vias (A and B) that belong to different nets

By following this structure, you can create and customize rules to ensure your PCB design meets all necessary requirements. Be sure to consult the syntax help dialog for precise instructions and thoroughly test your custom rules to ensure they function as intended

Step 5: Assign violation severity

The Violation Severity segment lets you assign the level of DRC violation when the rule is not followed.

You can set the severity for electrical, design for manufacturing, and schematic parity segments using the radio buttons. After providing your input, click OK.

KiCad is a versatile tool for electronic circuit design and corresponding PCB design, which requires familiarity and expertise. This guide on setting up KiCad for your PCB design will help you design faster and better.

Are you having trouble with your KiCad PCB design? Our design experts can answer your questions on our PCB forum, SierraConnect.