Author: Steve Sandler

Ultra-low Impedance Testing by Steve Sandler
Measuring PCB
Figure 1 - Optimizing Power

Optimizing Power for Clocks and other Sensitive Applications

Introduction The topic of clock jitter performance seems to be a current focus of clock, ADC, and power supply manufacturers.  The reasoning is clear; clock jitter interferes with the performance

Designing Power for Sensitive Circuits (Fig 2)

Designing Power for Sensitive Circuits

Low power, high performance circuits are often plagued by power supply related issues.  This common occurrence is frequently due to mythical (or misapplied) rules-of-thumb.