Skip to main content

How to Strategically Plan EMC-compliant PCB Stack-Ups

Headshot of Kenneth Wyatt

Kenneth Wyatt

Principal Consultant
Wyatt Technical Services LLC

Headshot of Vandana CC

Vandana CC

Engineering Project Coordinator
Sierra Circuits


Fill out the form:

Suppose you have followed every recommended layout guideline to ensure EMC, yet your design fails during signal integrity simulation. Where did things go wrong? The root cause lies in a decision made long before the first trace was routed, the stack-up.

In this webinar, you’ll learn how to engineer EMC-compliant PCB stack-ups that reduce design iterations and ensure signal integrity.

Practical strategies for designing high-performance stack-ups

Before creating the stack-up, you must define your design requirements. Identify your product’s electrical, mechanical, and thermal constraints early in the design cycle.

Determine operating frequency, target impedance, and current-carrying requirements. Categorize RF, analog, power, and sensitive signals so that each can be assigned a suitable routing layer and reference plane.

Next, select laminate materials based on electrical performance. Evaluate dielectric constant, dissipation factor, glass transition temperature, CTE, moisture absorption, and dimensional stability according to your application’s operating frequency and environmental conditions.

For a perfect stack-up strategy, you must choose the appropriate transmission line structure. Use stripline routing whenever lower radiation and better EMI immunity are required because the traces remain enclosed between reference planes. Adopt coplanar waveguides for RF applications, requiring improved field confinement.

To build an EMC-optimized layer stack, position high-speed signal layers adjacent to solid reference planes. Keep power and ground planes closely coupled to increase interplane capacitance. You should also maintain a symmetrical stack-up to improve both EMC performance and manufacturing reliability.

Finally, prepare complete and accurate stack-up documentation. Specify dielectric thicknesses, copper weights, finished board thickness, layer sequence, and impedance requirements. Review the proposed stack-up with your fabricator during the design phase so that your board is manufacturable.

By the end of this session, you’ll understand how to transform a stack-up from planning to a perfectly well-built board. Join this webinar and gain practical approaches for creating EMC-compliant PCB stack-ups.

 

What you’ll learn:

  • How EMC problems originate due to poor stack-up planning
  • Defining design requirements before planning a stack-up
  • Selecting the best laminate for your prototypes
  • Choosing the right transmission line
  • Building an EMC-optimized layer stack
  • Solid ground planes vs. copper pours
  • Tips to avoid board warping and mechanical stress
  • Stack-up information your fabricator needs
  • Q&A by Kenneth Wyatt

 

Presenters

Vandana CC, Engineering Project Coordinator at Sierra Circuits

With a strong foundation in physics, Vandana CC brings a deep technical understanding to her work in PCB design and electronics manufacturing. She holds a Master’s in Physics and has experience teaching before transitioning into research at the Indian Institute of Science.

At Sierra Circuits, Vandana has played a key role in R&D projects, contributing to the development of engineering tools and calculators, technical content creation, and customer demos. Currently, she focuses on project coordination, ensuring seamless collaboration both within the team and with external partners. Her expertise bridges the gap between technical innovation and practical application, making her an integral part of Sierra Circuits’ engineering efforts.

Kenneth Wyatt, Principal Consultant of Wyatt Technical Services LLC 

Kenneth Wyatt is principal consultant of Wyatt Technical Services LLC and served three years as the senior technical editor for Interference Technology magazine from 2016 through 2018. He has worked in the field of EMC engineering for over 30 years with a specialty in EMI troubleshooting and pre-compliance testing.

He is a co-author of the popular EMC Pocket Guide and RFI Radio Frequency Interference Pocket Guide. He also co-authored the book with Patrick André, EMI Troubleshooting Cookbook for Product Designers, with forward by Henry Ott. He recently completed and released a three-volume “EMC Troubleshooting Trilogy”, which is now available through Amazon. See web for ordering info.

He is widely published and authors a monthly column for the Signal Integrity Journal, has blogged for EDN.com for many years, has a monthly column for InCompliance Magazine (starting 2024), writes regularly for EEWorld and continues to write for Interference Technology Magazine. Ken is a senior life member of the IEEE and a longtime member of the EMC Society. To contact Ken, or for more information on technical articles, training schedules and links, check out his web site: www.emc-seminars.com.

Watch the Trailer
Screenshot from How to Strategically Plan EMC-compliant PCB Stack-Ups

Complete our form to unlock this webinar!

Talk to a Sierra Circuits PCB Expert today

24 hours a day, 7 days a week.

Call us: +1 (800) 763-7503
Book a Meeting with a Sales Rep
Email us: through our Customer Care form