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Ultra-HDI PCB Manufacturing Using mSAP Technology

Sierra Circuits manufactures 2/2 mil line and space features with precise trace geometry and tight impedance tolerances.

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How are Ultra-HDI Boards Manufactured?

  • UHDI designs use the mSAP technique to create ultra-fine 2/2 mil traces and spaces that are difficult to achieve with conventional subtractive etching.
  • The process produces highly defined copper features with near-vertical sidewalls and minimal undercut, helping maintain consistent impedance and signal performance.
  • The resulting traces are smoother and uniform, reducing insertion loss and signal degradation, much needed in high-speed designs.
  • Thinner traces and tighter spacing also create more room for component pads, microvias, and other critical features, increasing circuit density without adding layers or increasing board size.
Ideal for:
  • Compact and high-density designs
  • Fine-pitch component routing
  • Tight impedance requirements
  • Dense RF and microwave layouts
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Advanced UHDI Manufacturing Capabilities

  • At Sierra Circuits, we have been perfecting our ultra-HDI process since 2014 to consistently manufacture 2/2 mil (50/50 µm) trace-and-space features.
  • We constantly improve our process and equipment to keep up with advancing technology. The latest upgrades include dry film and vacuum lamination, direct imaging, mechanical vision drilling, laser drilling and routing, plasma etching, copper plating, electrical testing, and in-process/final inspection.
  • As trace widths get smaller, the processing window also shrinks. Hence, Sierra Circuits has developed an extensive system to monitor and control every process, chemistry, and piece of equipment to consistently deliver high-quality PCBs.
  • We use the XACT self-learning system and a database of around 260,000 reference builds to predict and track material movement for tight layer-to-layer registration in UHDI PCBs.
  • Our engineering team performs DFM analysis, stack-up optimization, and material recommendations tailored to your ultra-HDI and mSAP designs.
Stack-Up Stack-Up
Supported PCB Types   Rigid PCBs only (no flex)
Maximum Layer Count16
Maximum Layers with 2/2 TechnologyUp to 4 layers in the stack-up may utilize 2/2 technology
Maximum Copper Plating Thickness25 µm (1 mil) on layers containing 2/2 mil features
Supported MaterialsHigh-end materials from Isola, Panasonic/Megtron, EMC, Ventec, and other leading suppliers.
Note: We recommend using materials with a flat/spread glass support structure.
Unsupported MaterialsPTFE
Maximum Board Size6"×6"
Trace and Space Clearance Trace and Space Clearance
Minimum Trace/Space   50/50 µm (2/2 mil)
Minimum Trace-to-Via Pad≥60 µm (2.36 mil)
Minimum Trace-to-Copper Pour≥50 µm (1.97 mil)
Minimum Trace-to-Soldermask≥75 µm (2.95 mil)
Drill Parameters Drill Parameters
Via FillNot supported on outer layers containing 2/2 mil features
Laser Via Plating ThicknessUp to 20 µm (0.8 mil)
Laser Via Diameter101 µm (4 mil)
Capture Pad203.2 µm (8 mil)
Minimum Annular Ring (IPC Class 2)50 µm (2 mil)
Minimum Mechanical Drill Size104 µm (4.1 mil) for 2-layer boards ≤32 mil finished thickness
150 µm (5.9 mil) for boards with ≥2 layers
Surface Finish Surface Finish
Surface Finish AvailableIf the 2/2 mil line/space features are not covered by the solder mask, then only Immersion Silver surface finish is allowed.
If the copper feature is covered by solder mask, any standard surface finish may be used, including OSP, ENIG, Electrolytic Soft Gold or Electrolytic Hard Gold.
Lead Time Lead Time
Typical Lead Time1 week per lamination cycle
Note: Actual lead times may vary based on design complexity, including stacked laser vias, via-in-pad, edge-plated slots, and laser-milled cavities.
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DFM Guidelines for Ultra-High Density Interconnect PCBs

  • Keep 2/2 mil circuitry away from panel edges to reduce the risk of fabrication defects and improve manufacturing yield.
  • Prefer staggered over stacked microvias, as stacked require additional processing and can introduce greater mechanical stress on the board.
  • Maintain balanced copper distribution throughout fine-line regions and avoid large copper voids to improve manufacturability and plating uniformity.
  • Consider the increased resistance of ultra-fine traces when routing long signal paths. For example, a 50 microns wide, 10 microns thick copper trace has an approximate resistance of 0.5-0.6 Ω/in.
  • Reserve 2/2 mil traces for signal routing and avoid using them for power distribution.
  • For high-speed RF, SerDes, and impedance-controlled designs, account for trace geometry, copper characteristics, and material properties during signal integrity analysis.

Every UHDI design is unique. Talk to our experts to evaluate the design for manufacturability.

How to place an order for your UHDI PCBs

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Trusted by innovators

Engineers at the worlds most innovative companies choose Sierra Circuits for the highest quality ultra-HDI bord fabrication and assembly, right here in the USA.

Sierra Circuits is
headquartered in Silicon Valley.
We welcome visitors at
our 70,000 sqft facility,
located at 1108 West Evelyn Avenue
in Sunnyvale, California.
Book a tour with an account manager today!
Let us introduce you to one of the most innovative communities of engineers and designers in the world.
We can help you plan your project from design to assembled board.

Manufacturing Equipment at Sierra Circuits

Our 70,000 sqft state-of-the-art campus in the heart of Silicon Valley contains the most advanced equipment required for the manufacture and assembly of your PCBs. Whether you’re looking for standard quick turn PCBs or boards with the tightest tolerances, made from exotic metals, there’s a reason Sierra Circuits leads the industry in quality and performance.

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Talk to a Sierra Circuits PCB Expert today

24 hours a day, 7 days a week.

Call us: +1 (800) 763-7503
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Email us: through our Customer Care form