High-Speed PCB Via Design and Manufacturing

Amit Bahl

CRO
Sierra Circuits

Ernie Frohring

Field Application Engineer
EMA Design Automation

Techniques to design high-speed PCB vias

It is undesirable to have vias for signals operating in the GHz range. If this is not possible, you need to optimize the number and position of vias in your board layout. The aim is to minimize impedance discontinuities and ensure a smooth signal transfer.

In this webinar, you’ll learn the following aspects of high-speed PCB via design.

When the via impedance doesn’t match the line impedance, it results in signal reflection and parasitic effects. To prevent this, you should position the ground vias near the signal vias to create an inductance loop for the return current. You can also implement coaxial via geometry to prevent impedance discontinuities.

While placing vias on high-speed PCB traces, always keep the stub length as low as possible to manage signal attenuation. You need to ensure the signal’s maximum frequency is significantly lower than the stub fundamental resonant frequency. In addition to this, microvias offer more reliable signal transmission compared to through-hole vias.

In RF applications, via stitching ensures a continuous and low-impedance return path. Furthermore, to block EMI from reaching and coupling with the critical signals, employ via shielding to surround the sensitive signal traces with a barrier of ground vias or metal shielding.

To route DDRs in high-frequency circuits, a fly-by topology is ideal. It sequentially connects each memory module with the main controller, minimizing signal path length with fewer branches than T-topology.

When breaking out 0.4 and 0.5 mm BGAs, incorporate via-in-pad. It involves placing multiple vias directly under the solder pad where the BGA ball is attached. Employ non-solder mask-defined pads if your design allows enough room between adjacent BGA pads.

To eliminate the risk of annular ring breakout and drill wander in high-speed PCB vias, precise annular ring calculation is crucial. Additionally, prefer staggered microvias over stacked if your board fabrication needs more than 3 lamination cycles. This will reduce the risks of barrel and corner cracking.

In this webinar, the EMA and Sierra experts will practically demonstrate the best practices for designing high-speed PCB vias.

Agenda:

1. Ways to reduce unwanted via stubs and impedance discontinuities
2. Via stitching and shielding
3. How to break out a BGA using via-in-pad and dogbone structures
4. DDR routing with fly-by and T-topology
5. Via filling and tenting
6. Price comparison: conductive and non-conductive via filling, standard via, back drilling
7. Sierra Circuits’ PCB design tools:
a. Via Impedance Calculator
b. Maximum Via Stub Length Calculator

And a demo by EMA of the effects of via stub length on signal integrity and attenuation.

Meet the speakers