Webinar: Practical EMI Reduction Techniques Every PCB Designer Should Know
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August 26th, 2026 | 9 AM PT
COST: FREE
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26
Days
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0
Hours
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29
Minutes
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1
Seconds
Vandana CC
Engineering Project Coordinator at Sierra Circuits
Karen Burnham
President & Chief Engineer of EMC United
This webinar will be hosted on Zoom.
Following this event, you will receive:
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Slides
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Recording
Webinar abstract:
Have you ever struggled with an EMC test report that flagged multiple emission failures and wondered where things went wrong? The root cause may be traced back to decisions made during stack-up planning, signal routing, and component placement.
This webinar focuses on practical EMI reduction techniques that you can implement to improve EMC.
PCB design and layout strategies to manage EMI
The stack-up determines the EM environment for every signal on the board. A poorly planned build-up cannot be compensated later through routing alone. For high-speed digital designs, dedicate solid ground planes adjacent to signal layers so that return currents remain directly beneath the traces. Keep the dielectric between signal and reference plane relatively thin to reduce loop inductance.
High-speed signal routing directly influences crosstalk and radiated emissions. Every bend, layer transition, stub, and discontinuity might hamper signal integrity if not correctly managed. When a signal changes reference planes, add a stitching capacitor between the planes to provide a low-impedance return path. Keep high-speed traces away from board edges whenever possible.
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Return current behavior is one of the most misunderstood aspects of EMC design. At low frequencies, return current follows the path of least resistance, but at high frequencies it follows the path of least impedance. Any interruption in that reference plane forces current to spread outward, increasing radiated emissions. You should therefore avoid routing high-speed traces across voids created by antipads, mounting holes, or isolated copper islands. Examine the return path beneath every critical signal.
Decoupling capacitors provide a local energy reservoir for ICs while preventing high-frequency switching currents from propagating across the PDN. Position high-frequency bypass capacitors as close as possible to the power and ground pins of each IC. Minimize the connection length between the capacitor, power pin, and ground via to reduce loop inductance.
Shielding and filtering should be viewed as complementary techniques rather than substitutes for good PCB layout. Shielding confines EM fields, while filtering blocks unwanted frequency components from propagating through power/signal lines. Ensure the shield connects to the ground plane through multiple vias distributed around its perimeter. Position filters immediately adjacent to connectors and avoid long traces between filters and connectors to resist radiated emissions.
EMI should never be treated as a problem to solve after the PCB is built. It begins with informed layout decisions made from the very first stage of design. Join this webinar to learn proven EMI reduction techniques that help you build robust, EMC-compliant boards with fewer design iterations.
Webinar agenda:
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Why PCBs fail EMC compliance
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Distinguishing between common-mode and differential-mode noise
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Creating stack-ups for improved EMC
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Routing high-speed signals to minimize emissions
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Designing uninterrupted return current paths
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Placing components without triggering EMI
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Optimizing decoupling capacitor placement
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Shielding and filtering techniques for noisy components
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PCB design checklist for achieving first-pass EMC compliance
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Q&A by Karen Burnham
Vandana CC, Sierra Circuits
With a strong foundation in physics, Vandana CC brings a deep technical understanding to her work in PCB design and electronics manufacturing. She holds a Master’s in Physics and has experience teaching before transitioning into research at the Indian Institute of Science.
At Sierra Circuits, Vandana has played a key role in R&D projects, contributing to the development of engineering tools and calculators, technical content creation, and customer demos. Currently, she focuses on project coordination, ensuring seamless collaboration both within the team and with external partners. Her expertise bridges the gap between technical innovation and practical application, making her an integral part of Sierra Circuits’ engineering efforts.
Karen Burnham, EMC United
Karen Burnham has worked in and around the aerospace, defense, automotive, and broader consulting world since 1996. She has a BS in Physics, an MS in Electrical Engineering, and a talent for translating EMC to English. She has managed requirements and test planning for NASA and the Dream Chaser spaceship and others. She has done troubleshooting on electric vehicles for Ford Motor Company and others. She has initiated innovative SBIRs and STTRs through government centers and worked on classified programs. She has consulted on projects across a wide swath of industries and sits on multiple international standards committees, landing her in her current role of Vice President of Standards for the IEEE EMC Society.
Ms. Burnham founded EMC United, Inc. in 2024 in order to focus on helping companies and hardware designers solve EMC problems, ideally before they even start. She believes that, far from being black magic, EMC can be understandable (and even fun!), and she hopes to spread that passion more widely.
