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Webinar: Designing for Signal and Power Integrity Using Thin Laminates

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September 17th, 2025 | 10 AM PT

COST: FREE

  • 23

    Days

  • 7

    Hours

  • 1

    Minutes

  • 20

    Seconds

John Ranieri

OEM Director at Oak-Mitsui Technology’s FaradFlex™

Amit Bahl

CRO at Sierra Circuits

This webinar will be hosted on Zoom.

Following this event, you will receive:

  • button icon Slides

  • button icon Recording

Webinar abstract:

As high-speed designs push the limits of performance, signal and power integrity become more critical than ever, especially when working with ultra-thin laminates. In this webinar, we’ll explore how to successfully design PCBs for manufacturing while maintaining the electrical performance your application demands.

We’ll start by covering where designers often go wrong when it comes to DFM, and how to avoid costly mistakes early in the design process. You’ll learn best practices for selecting materials, planning your stack-up, optimizing trace widths and spacing, and managing vias, including via-in-pads.

From there, we’ll dive into what manufacturers actually need from your design files to ensure a successful build.

Then, we’ll take a closer look at FaradFlex’s material characteristics and how thin and high-DK laminates affect the impedance of the power distribution network. Critically, we will look at how spacing and dielectric constant between power and ground layers affects inductance at high frequencies.

We’ll also cover strategies for reducing EMI noise and how to improve signal integrity by optimizing the return path copper roughness.

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Webinar agenda:

  • button icon Where designers commonly go wrong with DFM
  • button icon How to design for manufacturing
    • o Picking materials and planning your stack-ups
    • o Optimizing trace width and space
    • o Designing vias and via-in-pads
    • o Implementing solder mask and silkscreen
  • button icon What the manufacturer needs from you
  • button icon FaradFlex key material characteristics
  • button icon Impedance of embedded capacitors
  • button icon Near-field EMI ground via stitching
  • button icon Signal integrity of power/ground return
John Ranieri's about image

John Ranieri

John Ranieri is the OEM Director for Oak-Mitsui Technology’s FaradFlex™ laminates - thin dielectrics for printed circuit board embedded capacitance. John has over 20 years’ experience in PCB materials at Oak-Mitsui and Rogers Corporation and has worked with OEM customers designing a wide range of high frequency and high-speed PCBs. John’s holds a B.S. in Chemical Engineering from Case Western Reserve University and an MBA from ASU’s W.P. Carey School of Business.

Amit Bahl's about image

Amit Bahl

Amit Bahl, widely recognized as the PCB Guy, currently serves as the Chief Revenue Officer at Sierra Circuits. He earned his Bachelor of Science in Engineering from UCLA in 1997, launching his career in Silicon Valley's tech industry. In 2009, he assumed the role of Director of Sales and Marketing at Sierra Circuits, with a dedicated focus on democratizing design for manufacturing best practices and guidelines for PCB designers and engineers. Assuming the position of Chief Revenue Officer since 2022, Amit's mission persists: to simplify the PCB design journey for all stakeholders. His unwavering dedication continues to drive Sierra Circuits as a trusted resource for the PCB design community.

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