Sierrathon – The PCB Design Challenge
REGISTER NOWNovember 22nd, 2025 | 9 AM to 5 PM
COST: FREE
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98
Days
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9
Hours
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51
Minutes
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48
Seconds
The Ultimate Prototype
Pushing the Boundaries of PCB Technology
One-day FULLY ON SITE competition at San Jose State University
Exciting prizes (we hope) await winners and participants!
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$2,000
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Sierra PCB fab & assembly
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$500 sponsorship towards a school project
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Mini 3D printer
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Digital logic analyzer
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Raspberry pi kit
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Digital microscope
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Soldering kit
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Mini smart SMD tester
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And more prizes...
Competition overview
Put your PCB skills to the test!
Sierrathon is not your average design competition, it’s a high-energy, fast-paced challenge where engineering students tackle real-world PCB design problems under pressure. Over the course of one intense day, teams will simulate the design process, earning points for accuracy, efficiency, and innovation. The team with the highest score takes home the Sierrathon Champion title!
Competition details
📍 Venue: San Jose State University, Room 285
📅 Date: Saturday, November 22nd
⏳ Duration: One full day from 9 AM to 5 PM (~8 hours, including breaks and awards)
🎯 Teams: 1-4 students per team
Check your eligibility!
Only students with basic PCB design skills will be qualified to sign up.
One-day FULLY ON SITE competition
- Competition goals:
- • Participants will be challenged to design a compact, functional PCB that meets specific performance, cost, and size requirements.
- • The focus will be on creating a practical, manufacturable board that achieves a defined purpose, while making thoughtful design decisions about component selection, layout, and overall functionality.
- • The competition encourages creativity, problem-solving, and engineering judgment under real-world constraints.
- We'll provide:
- • Schematic diagram with reference designators, pin numbers, and net names.
- • Bill of materials (BOM) with suggested part numbers, package types, and dimensions.
- • Placement rules (keep-out zones, connector edge positions, component clearance, etc.).
- • Routing constraints (minimum trace width, clearance, differential pair requirements if applicable).
- Your challenge:
- • Create the schematic in your design tool.
- • Build a stack-up with the number and types of layers you choose.
- • Place the components according to the given constraints.
- • Complete routing within the DRC rules.
- Phase 5: Live presentation
- • Present design decisions, optimizations, and trade-offs to a panel of judges.
- Scored on: Clarity, justification, and innovative thinking.
- Design tool guidance:
- • You’re free to use any PCB design software you prefer. We recommend KiCad since it’s free and open-source.
- • KiCad runs best on standard laptops; underpowered devices like Chromebooks may be slow.
- • Windows users with Intel graphics should ensure their drivers are fully up to date to avoid display issues such as green lines.
The mission behind Sierrathon
Sierra Circuits launched Sierrathon in 2024 to inspire and empower the next generation of engineers by providing a hands-on opportunity to design innovative circuit boards. Through this second hackathon, we aim to foster creativity, technical skill development, and collaboration among students, while also giving them access to our industry-leading tools and expert guidance. By engaging with the future leaders of electronics design, we strengthen the connection between academia and industry, ensuring a bright future for PCB technology.