Sierra met Yuriy Shlepnev, President & Founder of Simberian, during DesignCon 2018. His company is specialized in signal integrity tools and created a simulation tool called Simbeor THz.
0:07 Can you talk more about the tool Simberian has created?
Well, the tool we designed is called Simbeor THz and this is a tool for electromagnetic analysis of PCB interconnects. So we focus on PCB interconnects and the main idea is to design tools that basically provide a signal integrity engineer to make predictable interconnects. That’s basically the idea. We develop special techniques to guide signal integrity engineers through the whole process, to get analysis to measurement correlation at the end. And that’s what we do.
1:02 Is this a simulation tool?
Yes, this is simulation tool. And it’s based on computation electromagnetics, it includes multiple solvers based on a method of models, a method of lines, and new solvers. It allows this kind of new mesmerizing way to look into the interconnects and I call it “How Interconnects Work” to see the power flow density within the interconnects, and that helps to understand what’s going on within those structures.
1:56 Is the finite element method important for visualizing the power flow density?
Yes, well, not every finite element method, but rather a finite element method based on wave expansion. It’s called Trefftz Finite Elements. It’s based on the power flow formulation. So essentially, within the element you’ve got waves, waves carrying that power, and ensuring the continuity of the power flow. So, it’s all based on power flow. That’s why it provides a unique way to visualize the power flow, but this is the kind of entertaining so far component. I realized it in the development we developed this visualization for debugging purpose. And then I realize this is the kind of thing that somebody can use to see how interconnects work. But, the basic idea behind our tools is essentially to provide signal integrity engineers with some process. I call it “systematic sink or swim process” that guarantees analysis to measurement correlation in the end. And that’s all this is about.
And Trefftz Finite Elements was selected specifically for PCB application because it’s a kind of material blind. You can simulate fields within the conductor, outside the conductor, and within any material with high precision. And basically, zoom in and see how, where currents flow, where the power flows, where the electromagnetic energy goes. I realize that this is unlike the regular finite elements based on polynomial approximations. To look inside the conductor, you have to create very fine measures and that increases the simulation time. This is not happening with Trefftz Finite Elements.
4:13 What kind of output does the signal integrity tool need in order to provide analysis?
There are multiple modes to operate to solve signal integrity problems. Basically, there is the pre-layout stage where you draw the geometry within the tool or use some wizards to create the geometries. So, with Simbeor we have a number of wizards to come up with geometry quicker. We are PCB focused so we provide wizards to come up with transmission lines of 50 or 100 ohms quickly and with models for the transmission lines. This is pre-layout. So, technically all you need is just stack-up you’re your manufacturer.
In the post-layout stage, the engineer imports data through PCB databases, like ODB++ or they can also use directly files from Allegro and some other formats. But, that is to get the whole geometry in the tool and then the so-called post-layout analysis process. For the post-analysis process, we have a special tool called a board analyzer that does a decompositional electromagnetic analysis. This is the fastest way to simulate long interconnects. You decompose it into discontinuities and transmission lines and do the analysis.
And this year we preview our new automatic decomposition tool where you basically just select the net that creates the discontinuities selectors, allows to reuse models, and then output geometries around simulation and gets the result back. And then the result for the engineer is usually S-parameters or TDR/TDT or an eye diagram. And that’s all we calculate within our tool. But the most important part for the whole process, pre-layout, post-layout, is material characterization. So, in every tool, there are two things that go into the analysis, geometry and material models. In the case of PCBs, it’s really challenging because we need to broadband material models that work from DC to 50 gigahertz continuously. We then create the model boards for dielectrics and for conductor roughness. Now the conductor roughness is really important. So, using Simbeor you have many, many choices to select between different models, broadband models. And we support four material identification techniques. And two of them allow separation of losses between dielectric and conductor roughness. This is really important. We support short pulse propagation technique native from IBM. We support SPP light based on S-parameters and techniques based on generalized modal S-parameters. So, basically, it’s all in the material model.
And then geometry. Whatever you design is not really what you get at the end. So, your manufacturer will adjust it. We are aware of this and we try to establish a process for our customers that requires a minimal number of steps to identify those adjustments from manufacturers and also take them into account within the tool, just to make sure that simulations will match their measurements at the end.
8:10 What kind of details in a stack-up would be optimal for your tool?
Well, all details matter, and we are working with customers who want the analysis to measure calibration up to 40-50 GHz. Imagine this, and they want to use the cheapest manufacturing process. Well, in this case, during the typical design flaw, they have to really negotiate all the details of the stack-up with the manufacturer. Yesterday, we showed that one manufacturer provided really good data for most of the stack-up, except exterior layers, microstrip layers. To get better calibration from microstrip layers, we needed to cut the board and see the actual cross-section of the microstrip. So, the manufacturer provided the stack-up with information like the thickness of exterior 1.4 millimeters, when in reality, it was almost 3 millimeters. They didn’t provide any details on the solder mask, and it really matters for those 30 Gigabit/sec projects. They’re really good at the interior of the stack-up. So, you can get everything from the manufacturer, all the details, but, not for the exterior.
9:33 What kind of information is needed for the outer layers?
For the exterior layer, we need a shape of the microstrip. It usually is trapezoidal. And the shape of the solder mask; how it flows over the strips. So, the thickness on the top of the strip, and between, and some kind of idea of what the slope looks like. That’s what you can get from the cross-section. If your manufacturer does a cross-section, they will provide this information for you. A microstrip shaped like this is because of multiple processes involved in manufacturing, like plating. First, they etch, then they plate it, then they fill it with a solder mask. Those are results, and all processes are not well-controlled considering the geometrical precision.
On top of this, the exterior layers, they typically have different roughness because if they want them to be especially adhesive for the rough components on top. Components benefit from the fact that copper is rough, and you cannot peel them off, but the traces are the victims. So, you need to know what kind of roughness is on the microstrip layer. Typically, it’s different from what is inside, and with our tool you can basically, with a couple of measurements, identify the conductor roughness model for either the exterior layer or interior layer. The conductor roughness model is, basically, what is missing from the stack-up information. Typically, they provide numbers for the electric constant, loss tangent, at one frequency at least. You can use it to build broadband models, but nothing for conductor roughness. Conductor roughness is a major contributor to signal degradation at data rates like 20 Gigabit/sec, 30 Gigabit/sec, and higher.
11:54 Would data from PCB manufacturers in regards to cross-sections be relevant?
Oh, absolutely yes. There must be some process in the industry to build the conductor roughness models and basically say “Well, on this surface, it’s going to be a model with such-and-such parameters. On the other surface, it’s going to be another type of model, depending on the structure of the rough surface.” I think, so far, there are no movements in this direction, pretty much at all. Some people basically tried to enforce some manufacturers to characterize copper’s informal losses per inch, but that’s not useful for EDA tools. For an EDA tool, you need a material model that works in a broad frequency range.
But fortunately, with Simbeor, you can build such models and separate the conductor roughness with losses. From the dielectric losses, we have some process to guide you through this. And the only thing that’s necessary is parameter measurement and cross section. The cross-section is just to know the geometry, if you know the geometry in the middle, know a couple of measurements, we can identify the models and then make interconnects predictable.
13:25 Can you talk about the pre-layout analysis your software will do?
In the pre-layout analysis, there are basically three major signal degradation factors. Losses, reflection, and coupling. So, what people do in the pre-layout analysis is they develop some rules. What kind of space in between the transmission lines, for instance, you need to avoid coupling, crosstalk? Then, they identify the dimensions of the traces to have a specific impedance, impedance of the whole channel. And then they optimize the transition between layers. So in pre-layout, it’s kind of what-if scenarios. They use possible stack-ups from manufacturers and then try to play different scenarios. How interconnects may go through the structure, if they have to go in multiple layers then they need to optimize the reflection and see the effect of those reflections.
So at the end of the pre-layout process, you typically have a set of rules for the layout engineer that you have to do it like this. In case of Simbeor, they typically develop templates for via holes and they evaluate or trace dimensions or separation between the traces, and then the layout engineer layouts the board following those rules. The most important part missing in the pre-layout analysis usually is an accurate estimation of the losses. So with the reflection, you can use parameters from the dielectric expression, roughness is not important, same with crosstalk. But with the losses, you’re basically on your own. We are returning to the same thing, no models for the roughness and how you are going to estimate the roughness then. So we meant to build a simple test coupon to get the idea of what roughness is and I saw many presentations here. People say, “Yeah the only unknown key in our pre-layout analysis and even in the post-layout analysis is roughness.”
So what we do, we look through the papers and see some numbers and we put them and hope that it’s going to work. But the difference may be dramatic and it can be kind of a showstopper for the whole product. And so, that’s really kind of important.
16:05 What kind of outputs does your software provide to engineers?
Our software, Simbeor Thz, is a complete solution for just PCB interconnects. So in our case, that means that the end product is a skater in parameters, which is kind of mainstream models to exchange between the tools. Within Simbeor, you can evaluate pretty much all compliance metrics, like insertion loss, insertion loss deviation, integrated crosstalk noise. Those are developed within the standards as a complete metric for interconnects just to work analysis with the driver and receiver. So the vendors for the driver and receiver are responsible for the second point, they must work without any additional simulation.
Within Simbeor you can also compute TDR response and this is for troubleshooting. And you get an eye-diagram with simple sources just to predict or estimate how the eye will look like. No simulations with driver and receiver. It’s just the interconnect part only, and that includes all types of analysis for PCB interconnect part.
17:50 What kind of advice would you give to designers and manufacturers of high-frequency bulbs?
Well, the advice is you have to validate all parts of your process. To be able to design predictable interconnects, you have to make sure that your manufacturer makes interconnects as promised. So they will make them exactly as you designed, but at least they may provide you data on how the end product will look like, what adjustments they made, and better yet if they provide some statistical data. This is going to be a really good advice for PCB manufacturers: start gathering statistical data on the variation of traces, variation of the material properties, and so on.
And for designers, I call it design success triangle, where they have to evaluate every component in their process starting with the manufacturer. So you can trust your manufacturer but you also have to verify. Just make cuts. You have to verify in a systematic way. We provide in Simbeor a validation process and in two steps the result is guaranteed.
And you have to validate every single tool you use and it’s not common knowledge that tools, electromagnetic tools, are not equal. Some of them are not applicable to PCB interconnects and they cannot provide sufficient accuracies. The tool vendors are kind of benefiting from status quo in the industry where the end users, they pay a lot of money and they don’t validate the tools because they trust it.
So my advice is to give it a try, build a validation platform with a broad range of structures and see how measurements correlate with your analysis, with your expectation essentially. Or buy such platform from companies like Wild River, which basically sells validation platforms where you have a broad range of interconnect structures. All you need is just to learn how to measure it, and this is a separate part. It’s really kind of difficult to measure it up to 50 Ghz. It’s a whole different story. And then you try to do the analysis and your tools and see where you end up.
20:33 How important is DesignCon to you and to the signal integrity, power integrity, and EMI community?
This is the event number one for us, where we meet pretty much all our customers. You’ve got engineers, you’ve got all the companies, you’ve got all the interconnect manufacturers here at one location.
Good content, I’m personally Chair Organizer of Track 14 Analysis and Modeling of Interconnects, and it becomes really kind of popular. This year we got over 30 proposals for our track and the best 10 were selected. I enjoyed sitting through all those presentations and learned a lot. And now I know what my next steps are, we’re learning from our customers, from presentations at DesignCon.
This is a great event. I participate through the whole kind of process. Preparation, selection, and I enjoy it.
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