For a Successful PCB, Communication Is Key

Data Sheets Are Incomplete Guides

Call me a broken record, but I’ll say it again: Consult a manufacturer before beginning any complex board design, and by complex I mean at the very least, any project involving controlled impedance, unusual operating environments, high voltage, high current, or tolerances tighter than IPC Class 2. The best precaution you can take to help you achieve a board design for high manufacturing yield, greatest reliability, and the lowest possible cost is to dialogue with your manufacturer to help determine the optimum material set and stack-up.

A dozen or more materials from competing suppliers may appear to have nearly identical characteristics, but the only way to distinguish which is through experience.

Laminates and prepregs may seem well characterized in data sheets, and they conform by category to the requirements spelled out in the various IPC specification (“slash”) sheets, but that information is merely a starting point for predicting how they will behave during and after fabrication. On paper, a dozen or more materials from competing suppliers may appear to have nearly identical characteristics, but the only way to distinguish which is best for a particular application is through experience.

Consider the following example: Polyimides are candidates when performance at high temperature is a concern and they also offer low dielectric loss. Military and aerospace customers frequently specify them; sometimes they request a material from a particular supplier, but often they simply call out one of the three IPC slash sheet numbers that pertain to those materials. There are many comparable materials from several suppliers that all conform to the same standard.

Figure 1: positive etchback removes a slight amount of dielectric between internal copper planes, to expose more area of the planes for connection with the via barrels. (Illustration courtesy of IPC)
Figure 1: positive etchback removes a slight amount of dielectric between internal copper planes, to expose more area of the planes for connection with the via barrels. (Illustration courtesy of IPC)

The Importance of the Etchback Process

Mil/aero customers typically require fabrication to satisfy Class 3A requirements—the most stringent IPC tolerances. It is also routine for those customers to also specify positive etchback for through-hole vias, though there is some debate whether the etchback does or does not provide the intended strength improvement to the unions between the plated via barrels and inner copper planes. Etchback results in a three-point connection between a via barrel and inner planes, akin to a mortise-and tenon joint in carpentry.

Figure 2: Wicking in the test boards with this particular polyimide following etchback and electroless copper deposit could not meet the IPC class 3A limit despite strict adherence to the recommendation from the material supplier and several process adjustments.
Figure 2: Wicking in the test boards with this particular polyimide following etchback and electroless copper deposit could not meet the IPC class 3A limit despite strict adherence to the recommendation from the material supplier and several process adjustments.

The etchback processes used to bolster the connections are well-established, but somewhat complicated, requiring precise control of various chemistries and exposure times. After the board layers have been laminated and drilled, the panels are sent to a plasma etching machine. Within the machine, an RF field is applied to a combination of gases, which then eats away at the resin that binds the dielectric between the copper inner planes. The copper is not attacked at this stage, nor are the glass fibers of the dielectric, but a small area at the upper and lower surfaces of each inner copper plane is uncovered by the removal of up to 3 mils of resin between them. The etchback also desmears the hole bores from drilling debris.

Next, the panels are sent to a chemical bath that removes the glass fibers that were bared where the resin was etched back, which would otherwise interfere with depositing and plating copper in the bores. The panels are rinsed, and then immersed in an alkaline solution to further treat the bores so electroless copper will adhere. There are upwards of 30 subsequent baths and rinses leading to the electroless deposition of copper as a seed to bind copper plating to the hole bores and to the areas of the inner layers that were exposed by etching back the dielectric.

Worst-case wicking is well within class 3A tolerance after electroless copper deposition (a) andvia plating (b).
Figure 3: Worst-case wicking is well within class 3A tolerance after electroless copper deposition (a) andvia plating (b).

IPC Class 3 Requirements and Restrictions

How do those minute details about etchback relate to seeking design advice from a board manufacturer at the outset of a project? Remember, I mentioned there are many alternative polyimide materials whose published specifications are very similar to one another. But if you were to pick one independently based on those specs, architect a stackup, and devote months to perfecting a design that works fine in simulation, you would likely wind up with an unmanufacturable product, if etchback and Class 3A tolerances are key requirements.

Why? Because IPC Class 3A stipulates that wicking cannot exceed 50 microns (just under 2 mils). Wicking refers to the migration of copper into the dielectric. The plasma etchback, alkaline bath, and the chemicals that remove the glass fibers must be very carefully controlled to minimize wicking. Compared to the Class 3 limit for wicking, which is very demanding, the Class 3A tolerance is 40 percent tighter.

If you want through-hole etchback and fabrication to meet 3A requirements, only certain of the polyimides that conform to IPC-4101/41 can meet the wicking tolerance. It takes an experienced manufacturer to know which ones.

You may never need to meet such objectives, but anytime you deviate from your routine requirements, check with your PCB manufacturer before you establish a stackup.
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