Sierra Circuits at DesignCon 2018

Sierra Circuits at DesignCon 2018 post thumbnail image

Get 20% off All-Access or 2-Day Pass with Sierra’s code EXD-NgCzcL89

From January 30 to February 1, Sierra Circuits will attend DesignCon 2018 at the Santa Clara Convention Center. As a printed circuit board manufacturer and assembler, it is essential for us to be a part of the trade show “where the chip meets the board.”

Sierra Circuits specializes in quickturn prototype, including high-density interconnect and high-speed technology. We have worked with over 20,000 engineers and PCB designers since 1986 and provide our customers with quality, reliability, and a single point of support. We handle all aspects of PCB production: our PCBs are manufactured and assembled in our facilities located in Sunnyvale, California, in the heart of the Silicon Valley. This allows us to deliver our products to our customers in five days or less. Our goal is to work hand in hand with designers to help them get it right the first time, and save time and money.

We are also ISO 13485:2003, ISO 9001:2008 and ITAR certified.

Visit us and get our free Controlled Impedance Design Guide!

Because high-speed designs are more commonplace and the impact on the performance is becoming greater and greater, PCB designers need to know what nets require controlled impedance, what to specify in the fabrication drawing, how to design controlled impedance traces, how to get a stack-up from manufacturers… This is why Sierra Circuits created a design guide to teach designers how to design a board with controlled impedance by themselves.

This guide empowers designers: the purpose is to get you on the advanced side of controlled impedance.

Come talk with our experts at Booth #847 and get a free Design Guide to master controlled impedance, articles about high-speed PCB design, and fidget spinners!

Design Con 2018 register

Get 20% off All-Access or 2-Day Pass with Sierra’s code EXD-NgCzcL89

Tags: , , , ,

Leave a Reply

Your email address will not be published.