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#1. What is the ideal aspect ratio for microvia?
2:1 #2. Why is it better to have a larger aspect ratio for vias?
Reliability of the plated through hole will be higher and can be easily manufactured
Larger aspect ratios eliminate the need for via copper plating
Larger aspect ratios are more cost-effective
None of the above #3. What is the main difference between plated holes (PTH) and non-plated holes (NPTH)?
PTH conduct signals whereas NPTH are used to position components
NPTH are more cost-effective than PTH
PTH cut down on parasitic inductance whereas NPTH do not
PTH and NPTH have different tolerances #4. Which via should be used to save space on the outer layers of a PCB?
Microvia #5. Which of these statements about via hole drilling is false?
Mechanical drilling is used for through-holes and back drilling
Laser drilling is used for blind and buried holes
Laser drilling is used for through-holes and buried holes
Laser drilling enables smaller drill diameters than mechanical drilling #6. What is another name for pad to hole ratio in a via?
Drill to pad ratio
Both 1 and 2 #7. According to IPC standards, the diameter of buried and blind vias should be:
≦ 6 mils
≦ 5 mils
≦ 7 mils
≦ 4 mils #8. What is the main reason to choose via-in-pad over conventional vias?
To handle high package densities in HDI boards where routing is critical
To decrease the manufacturing cost of a PCB
To increase signal integrity
To increase the structural integrity of the PCB #9. Why does via-in-pad require a non-conductive epoxy fill?
To improve thermal insulation between laminates
To provide insulation between the interconnecting hole and the footprint
To add to ease of manufacturing
To be cost-effective as compared to soldermasking #10. What is back-drilling?
Holes drilled for mounting component
Drilling technique used to remove the via stubs to avoid signal distortions
Drilling technique used for deburring and desmearing #11. When do you implement back-drilling?
Minimizing aspect ratio
Using conductive epoxy via fill for the via-in-pad
Planarization of copper plating
When multiple blind vias are placed symmetrical to both external ends of the PCB #12. Which of these are not part of the PCB via finish process?