Clement Luk at DesignCon 2016
Join Clement Luk, a Signal Integrity engineer at Hirose Electric, at his DesignCon presentations this week! Luk is involved in high speed connector design, device and channel simulation and measurement.
Tradeoff Between Tightly and Loosely Coupled Differential Vias for Multi-GBPS Design
Wednesday, January 20
9:20 — 10:00 am
In an ideal world, tightly-coupled differential vias seems to be an excellent choice for a multi-Gbps channel. However, considering practical design issues, will tightly coupled design still be a good candidate? This talk investigates both tightly coupled and loosely coupled design and used practical examples to illustrate their pros and cons as well as theory behind them. Hence hardware engineer can evaluate the tradeoffs in via design and make prudent decision for their board in a channel.
Clement Luk — Signal integrity engineer, Hirose Electric
Jeremy Buan — Signal Integrity Engineer, Hirose Electric
Adam Nagao — Signal Integrity Engineer, Hirose Electric
Toshi Takada — Signal Integrity Manager, Hirose Electric
Ching-Chao Huang — President, AtaiTec Corp